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Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: uart_verilog Download
 Description: Serial port of the Verilog source code can be carried out under the modelsim simulation debugging
 Downloaders recently: [More information of uploader 619102295]
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  • [uart] - An FPGA using Verilog realization of the
File list (Check if you may need any files): 
uart_verilog
............\rcvr.v
............\rcvr_tf.v
............\readme.doc
............\readme.txt
............\txmit.v
............\txmit_tf.v
............\uart.v

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