Description: libero in actel application development environment are the basis of the documentation of the macro, it is difficult to get information
- [uart_rx] - actel A3P250 fpga with VERILOG HDL Seria
- [Actel_crack] - Actel Tool License file
- [ACTELfPGA] - ACTEL complete the development of the FP
- [uart8] - Libero provided the use of asynchronous
- [UART] - The main chip: Actel' s FPGA030, Veri
- [A3P030CN] - Actel' s A3P030 the English version o
- [IGLOO_Icicle_LCPS_SS] - Actel IGLOO_Icicle scematics.
File list (Check if you may need any files):
pa3_libguide_ug.pdf