Description: Quartus II project files, is a typical FPGA-based digital clock project, there are sub-50MHz frequency, counting, decoding modules. Using VHDL language.
- [VerilogDHLdigitalclock.Rar] - Verilog language used in the preparation
- [shuzizhongsheji] - multifunctional design of a digital cloc
- [clock] - VHDL based on the digital clock has an a
- [clock] - Two buttons control the school at the ti
- [1234] - Multifunction digital clock, in the quar
- [MATLAB_and_FPGA] - CD-ROM Appendix Description The book com
- [DSP_yingyongjishu] - Modern DSP technology is the Xi' an U
- [clk] - Quartus II project files, is a typical F
- [shuzizhong] - Verilog digital clock can be written in
- [fpgaTIME] - FPGA clock-controlled design Verilog HDL
File list (Check if you may need any files):
clk_vhdl.qar
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