Description: The use of VHDL to accomplish three simple procedures: BCD adder ALU arithmetic logic unit simple lock design, with input passwords and data comparing the two functions, the decision written by M, or unlock. The data is used to write the column address and enter the number of combining methods into the initial password unlock, the password to enter, and then enter the data one by one with the input a set of data comparison, the perfect match then unlock.
To Search:
- [someVHDLsourcecode.Rar] - within waveform generator, Adder, classi
- [100vhdlexample.Zip] - 100vhdl example of the basic circuit use
- [bcd] - Code to achieve a BCD adder, and a binar
- [adder] - Vhdl adder with the realization of the f
- [BCD8] - 8-bit decimal BCD adder yards, using loo
File list (Check if you may need any files):
project\数电大作业\BCDADDER.v
.......\..........\BCDADDER.vwf
.......\..........\zhang.v
.......\..........\zhang.vwf
.......\..........\zhang2.v
.......\..........\zhang2.vwf
.......\..........\数电大作业.docx
.......\数电大作业
project
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