Description: DDS power supply design, use of LPM_FILE SIN_ROM.VHD shall modify the path for personal MIF file, this set of procedures in multiple MIF files, pay attention to choose the appropriate file.
To Search:
- [dds] - Do a DDS, a successful simulation with q
- [DDS] - The code is implemented in fpga a dds, p
File list (Check if you may need any files):
dds5.0\ADDER10B.vhd
......\ADDER32B.vhd
......\db\add_sub_1ph.tdf
......\..\add_sub_toh.tdf
......\..\altsyncram_gi21.tdf
......\..\altsyncram_t431.tdf
......\..\DDS_VHDL.asm.qmsg
......\..\DDS_VHDL.cbx.xml
......\..\DDS_VHDL.cmp.cdb
......\..\DDS_VHDL.cmp.hdb
......\..\DDS_VHDL.cmp.kpt
......\..\DDS_VHDL.cmp.logdb
......\..\DDS_VHDL.cmp.rdb
......\..\DDS_VHDL.cmp.tdb
......\..\DDS_VHDL.cmp0.ddb
......\..\DDS_VHDL.dbp
......\..\DDS_VHDL.db_info
......\..\DDS_VHDL.eco.cdb
......\..\DDS_VHDL.fit.qmsg
......\..\DDS_VHDL.fnsim.hdb
......\..\DDS_VHDL.fnsim.qmsg
......\..\DDS_VHDL.hier_info
......\..\DDS_VHDL.hif
......\..\DDS_VHDL.map.cdb
......\..\DDS_VHDL.map.hdb
......\..\DDS_VHDL.map.logdb
......\..\DDS_VHDL.map.qmsg
......\..\DDS_VHDL.pre_map.cdb
......\..\DDS_VHDL.pre_map.hdb
......\..\DDS_VHDL.psp
......\..\DDS_VHDL.rpp.qmsg
......\..\DDS_VHDL.rtlv.hdb
......\..\DDS_VHDL.rtlv_sg.cdb
......\..\DDS_VHDL.rtlv_sg_swap.cdb
......\..\DDS_VHDL.sgate.rvd
......\..\DDS_VHDL.sgate_sm.rvd
......\..\DDS_VHDL.sgdiff.cdb
......\..\DDS_VHDL.sgdiff.hdb
......\..\DDS_VHDL.signalprobe.cdb
......\..\DDS_VHDL.sim.hdb
......\..\DDS_VHDL.sim.qmsg
......\..\DDS_VHDL.sim.rdb
......\..\DDS_VHDL.sim.vwf
......\..\DDS_VHDL.sld_design_entry.sci
......\..\DDS_VHDL.sld_design_entry_dsc.sci
......\..\DDS_VHDL.syn_hier_info
......\..\DDS_VHDL.tan.qmsg
......\..\wed.zsf
......\db
......\DDS_VHDL.asm.rpt
......\DDS_VHDL.done
......\DDS_VHDL.dpf
......\DDS_VHDL.fit.rpt
......\DDS_VHDL.fit.smsg
......\DDS_VHDL.fit.summary
......\DDS_VHDL.flow.rpt
......\DDS_VHDL.map.rpt
......\DDS_VHDL.map.summary
......\DDS_VHDL.mif
......\DDS_VHDL.pin
......\DDS_VHDL.pof
......\DDS_VHDL.qpf
......\DDS_VHDL.qsf
......\DDS_VHDL.qws
......\DDS_VHDL.sim.rpt
......\DDS_VHDL.sof
......\DDS_VHDL.tan.rpt
......\DDS_VHDL.tan.summary
......\DDS_VHDL.vhd
......\REG10B.vhd
......\REG32B.vhd
......\RESULT.vwf
......\ROM_DATA.MIF
......\SIN_ROM.vhd
dds5.0
Download