dds\adder10b.vhd
...\adder32b.vhd
...\db\altsyncram_r041.tdf
...\..\dds_vhdl.asm.qmsg
...\..\dds_vhdl.cbx.xml
...\..\dds_vhdl.cmp.cdb
...\..\dds_vhdl.cmp.hdb
...\..\dds_vhdl.cmp.kpt
...\..\dds_vhdl.cmp.logdb
...\..\dds_vhdl.cmp.rdb
...\..\dds_vhdl.cmp.tdb
...\..\dds_vhdl.cmp0.ddb
...\..\dds_vhdl.dbp
...\..\dds_vhdl.db_info
...\..\dds_vhdl.eco.cdb
...\..\dds_vhdl.fit.qmsg
...\..\dds_vhdl.hier_info
...\..\dds_vhdl.hif
...\..\dds_vhdl.map.cdb
...\..\dds_vhdl.map.hdb
...\..\dds_vhdl.map.logdb
...\..\dds_vhdl.map.qmsg
...\..\dds_vhdl.pre_map.cdb
...\..\dds_vhdl.pre_map.hdb
...\..\dds_vhdl.psp
...\..\dds_vhdl.pss
...\..\dds_vhdl.rtlv.hdb
...\..\dds_vhdl.rtlv_sg.cdb
...\..\dds_vhdl.rtlv_sg_swap.cdb
...\..\dds_vhdl.sgdiff.cdb
...\..\dds_vhdl.sgdiff.hdb
...\..\dds_vhdl.signalprobe.cdb
...\..\dds_vhdl.sld_design_entry.sci
...\..\dds_vhdl.sld_design_entry_dsc.sci
...\..\dds_vhdl.syn_hier_info
...\..\dds_vhdl.tan.qmsg
...\dds.sof
...\dds_vhdl.asm.rpt
...\dds_vhdl.cdf
...\dds_vhdl.done
...\dds_vhdl.dpf
...\dds_vhdl.fit.rpt
...\dds_vhdl.fit.smsg
...\dds_vhdl.fit.summary
...\dds_vhdl.flow.rpt
...\dds_vhdl.map.rpt
...\dds_vhdl.map.summary
...\dds_vhdl.pin
...\dds_vhdl.pof
...\dds_vhdl.qpf
...\dds_vhdl.qsf
...\dds_vhdl.qws
...\dds_vhdl.sof
...\dds_vhdl.tan.rpt
...\dds_vhdl.tan.summary
...\dds_vhdl.vhd
...\reg10b.vhd
...\reg32b.vhd
...\sin_rom.cmp
...\sin_rom.mif
...\sin_rom.vhd
...\复件 sin_rom.vhd
...\db
dds