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VHDL-FPGA-Verilog
Title:
fix2float_signed
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Category:
VHDL-FPGA-Verilog
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File Size:
3kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
339252063
Description:
Conversion from signed fixed-point to floating-point representation
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fix2float_signed.vhd
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