Description: rax2 fft implation the fft in
verilog instance and in ise of xilinx
it show how to istance fft core and the port used
- [interleave] - -Verilog code for interleave.
- [VERcf_fft_1024_8] - 1024-point FFT eight Verilog language
- [NumClock] - based Altera FPGA series (Cyclone EP1C3T
- [FFTtttji] - FFT-2- 2 processor (sentinel, 16bit, 50M
- [studyFFTcore] - Call FPGA implementation of the IP core
- [fft_rtl] - fft transform based on rtl design
- [fft64] - the fft of 64 points
- [yy] - XILINX board provided the use inside the
- [64point_FFT] - 64-point Pipeline FFT, Verilog language
- [fft] - vhdl code and verilog code for an 128 po
File list (Check if you may need any files):
rax2.txt