src FIR filter design, complete coverage of RTL co - CodeBus

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VHDL-FPGA-Verilog

Title: src

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
9kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
sagillqq342

Description: FIR filter design, complete coverage of RTL code, testbench, etc., clear and understandable.

Downloaders recently: [More information of uploader sagillqq342]

To Search: fir

[fir] - VHDL language with my own series of 16-o
[modelsim] - filter
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[FIR-filter-using-fpga-design] - FIR using FPGA ，QuartusII software
[fir_compiler] - FIR Compiler. Automatically generate a u

File list (Check if you may need any files):

src\crom.v
...\fir.v
...\fir_PK.v
...\fir_tb.v
...\pe.v
src

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