Description: Using Altera' s NIOS core, with a separate accumulator, to achieve a sine wave, triangle wave, sawtooth and square wave generation circuit DDS system clock up to 120MHz, with high-speed DAC, can produce up to about 40MHz waveform around
- [dds_drive.h] - Dds in NIOS generated the. H file, with
File list (Check if you may need any files):
nios_dds\.sopc_builder\.svn\all-wcprops
........\.............\....\entries
........\.............\....\text-base\install.ptf.svn-base
........\.............\....\.........\install2.ptf.svn-base
........\.............\....\.........\preferences.xml.svn-base
........\.............\install.ptf
........\.............\install2.ptf
........\.............\preferences.xml
........\..vn\all-wcprops
........\....\entries
........\....\prop-base\acc_wave0.jpg.svn-base
........\....\.........\cpu.ocp.svn-base
........\....\.........\cpu.v.svn-base
........\....\.........\EP2C8_EVK_0A1.pdf.svn-base
........\....\.........\lpm_rom0_wave0.jpg.svn-base
........\....\.........\nios_sys.pof.svn-base
........\....\.........\nios_sys.sof.svn-base
........\....\.........\saw.bin.svn-base
........\....\.........\saw_rom_wave0.jpg.svn-base
........\....\.........\sine.bin.svn-base
........\....\.........\squ.bin.svn-base
........\....\.........\squ_rom_wave0.jpg.svn-base
........\....\.........\tri.bin.svn-base
........\....\.........\tri_rom_wave0.jpg.svn-base
........\....\text-base\7404_0.vhd.svn-base
........\....\.........\7404_1.vhd.svn-base
........\....\.........\7404_3.vhd.svn-base
........\....\.........\7404_4.vhd.svn-base
........\....\.........\7404_5.vhd.svn-base
........\....\.........\7404_6.vhd.svn-base
........\....\.........\74139m_2.vhd.svn-base
........\....\.........\acc.bsf.svn-base
........\....\.........\acc.cmp.svn-base
........\....\.........\acc.qip.svn-base
........\....\.........\acc.vhd.svn-base
........\....\.........\acc_wave0.jpg.svn-base
........\....\.........\acc_waveforms.html.svn-base
........\....\.........\altpllsys_pll.bsf.svn-base
........\....\.........\altpllsys_pll.cmp.svn-base
........\....\.........\altpllsys_pll.ppf.svn-base
........\....\.........\altpllsys_pll.qip.svn-base
........\....\.........\altpllsys_pll.v.svn-base
........\....\.........\altpllsys_pll_bb.v.svn-base
........\....\.........\bash.exe.stackdump.svn-base
........\....\.........\core.bsf.svn-base
........\....\.........\core.ptf.bak.svn-base
........\....\.........\core.ptf.pre_generation_ptf.svn-base
........\....\.........\core.ptf.svn-base
........\....\.........\core.qip.svn-base
........\....\.........\core.sopc.svn-base
........\....\.........\core.sopcinfo.svn-base
........\....\.........\core.v.svn-base
........\....\.........\core_burst_0.v.svn-base
........\....\.........\core_burst_1.v.svn-base
........\....\.........\core_burst_10.v.svn-base
........\....\.........\core_burst_11.v.svn-base
........\....\.........\core_burst_12.v.svn-base
........\....\.........\core_burst_13.v.svn-base
........\....\.........\core_burst_14.v.svn-base
........\....\.........\core_burst_15.v.svn-base
........\....\.........\core_burst_2.v.svn-base
........\....\.........\core_burst_3.v.svn-base
........\....\.........\core_burst_4.v.svn-base
........\....\.........\core_burst_5.v.svn-base
........\....\.........\core_burst_6.v.svn-base
........\....\.........\core_burst_7.v.svn-base
........\....\.........\core_burst_8.v.svn-base
........\....\.........\core_burst_9.v.svn-base
........\....\.........\core_clock_0.v.svn-base
........\....\.........\core_clock_1.v.svn-base
........\....\.........\core_clock_2.v.svn-base
........\....\.........\core_generation_script.svn-base
........\....\.........\core_log.txt.svn-base
........\....\.........\core_setup_quartus.tcl.svn-base
........\....\.........\cpu.ocp.svn-base
........\....\.........\cpu.sdc.svn-base
........\....\.........\cpu.v.svn-base
........\....\.........\cpu_bht_ram.mif.svn-base
........\....\.........\cpu_dc_tag_ram.mif.svn-base
........\....\.........\cpu_ic_tag_ram.mif.svn-base
........\....\.........\cpu_jtag_debug_module_sysclk.v.svn-base
........\....\.........\cpu_jtag_debug_module_tck.v.svn-base
........\....\.........\cpu_jtag_debug_module_wrapper.v.svn-base
........\....\.........\cpu_mult_cell.v.svn-base
........\....\.........\cpu_ociram_default_contents.mif.svn-base
........\....\.........\cpu_rf_ram_a.mif.svn-base
........\....\.........\cpu_rf_ram_b.mif.sv
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