Description: Language: VHDL
function: the use of VHDL programming, FPGA on SRAMIS61LV24516 read and write operations. Because it is read and write for IS61LV24516 model, if not required for this type of SRAM timing of the program changes.
Simulation tools: modelsim
synthesis tool: quartus II
- [IS61LV25616AL] - verilog model of the IS61LV25616AL de sr
- [videocap] - Video capture control of the cache SRAM
- [VHDL] - This article describes the use of exampl
- [Quartus_fft_ip_core] - The use of FFT IP core in Quartus
- [sram] - Data storage and reading circuit in a du
File list (Check if you may need any files):
SRAM.vhd
Download