Description: Using an arbitrary odd number n+0.5 verilog divide, the use of simulation testing ise11.1 and modelsim se6.5
To Search:
File list (Check if you may need any files):
div_n_0_5\.cxl.mti_se.version
.........\.lso
.........\compxlib.log
.........\div_n_0_5.cmd_log
.........\div_n_0_5.gise
.........\div_n_0_5.ise
.........\div_n_0_5.lso
.........\div_n_0_5.ngc
.........\div_n_0_5.ngr
.........\div_n_0_5.ntrc_log
.........\div_n_0_5.prj
.........\div_n_0_5.stx
.........\div_n_0_5.syr
.........\div_n_0_5.udo
.........\div_n_0_5.v
.........\div_n_0_5.xise
.........\div_n_0_5.xst
.........\div_n_0_5_summary.html
.........\div_n_0_5_wave.fdo
.........\..........xdb\cst.xbcd
.........\.............\tmp\ise\version
.........\.............\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
.........\.............\...\...\............\..................\.........\HDProject_StrTbl
.........\.............\...\...\............\..................\__stored_object_table__
.........\.............\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
.........\.............\...\...\............\.........\.......\RunOnce_tcl_StrTbl
.........\.............\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
.........\.............\...\...\............\................\................\dpm_project_main_StrTbl
.........\.............\...\...\............\................Gui\CViewSelector
.........\.............\...\...\............\...................\CViewSelector_StrTbl
.........\.............\...\...\............\...................\File-SynthesisOnly
.........\.............\...\...\............\...................\File-SynthesisOnly_StrTbl
.........\.............\...\...\............\...................\Library-SynthesisOnly
.........\.............\...\...\............\...................\Library-SynthesisOnly_StrTbl
.........\.............\...\...\............\...................\Process-BehavioralSim-
.........\.............\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG
.........\.............\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG_StrTbl
.........\.............\...\...\............\...................\Process-BehavioralSim-_StrTbl
.........\.............\...\...\............\...................\Process-SynthesisOnly-
.........\.............\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG
.........\.............\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG_StrTbl
.........\.............\...\...\............\...................\Process-SynthesisOnly-_StrTbl
.........\.............\...\...\............\...................\Source-BehavioralSim-AutoCompile
.........\.............\...\...\............\...................\Source-BehavioralSim-AutoCompile_StrTbl
.........\.............\...\...\............\...................\Source-SynthesisOnly-AutoCompile
.........\.............\...\...\............\...................\Source-SynthesisOnly-AutoCompile_StrTbl
.........\.............\...\...\............\xreport\Gc_RvReportViewer-Current-Module
.........\.............\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
.........\.............\...\...\............\.......\Gc_RvReportViewer-Module-Data-div_n_0_5
.........\.............\...\...\............\.......\Gc_RvReportViewer-Module-Data-div_n_0_5_StrTbl
.........\.............\...\...\............\.......\Gc_RvReportViewer-Module-Data-div_odd
.........\.............\...\...\............\.......\Gc_RvReportViewer-Module-Data-div_odd_StrTbl
.........\.............\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
.........\.............\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
.........\.............\...\...\..REGISTRY__\Autonym\regkeys
.........\.............\...\...\............\bitgen\regkeys
.........\.............\...\...\............\...init\regkeys
.........\.............\...\...\............\common\regkeys
.........\.............\...\...\............\.pldfit\regkeys
.........\.............\...\...\............\dumpngdio\regkeys
.........\.............\...\...\............\fuse\regkeys
.........\.............\...\..