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Title: usrp_inband_usb_WORKS Download
 Description: Universal Software Radio Platform FPGA code, very useful. Written by Verilog
 Downloaders recently: [More information of uploader zhoukan_china]
 To Search:
  • [DDC] - Verilog language implementation of the d
  • [verilog] - The code design is a software-defined ra
  • [DWT-VHDL] - Wavelet transform VHDL code, with a posi
File list (Check if you may need any files): 
usrp_inband_usb_WORKS\.svn
.....................\....\prop-base
.....................\....\props
.....................\....\text-base
.....................\....\tmp
.....................\....\...\prop-base
.....................\....\...\props
.....................\....\...\text-base
.....................\config.vh
.....................\db
.....................\incremental_db
.....................\..............\compiled_partitions
.....................\undo_redo.txt
.....................\usrp_inband_usb.asm.rpt
.....................\usrp_inband_usb.csf
.....................\usrp_inband_usb.done
.....................\usrp_inband_usb.esf
.....................\usrp_inband_usb.fit.rpt
.....................\usrp_inband_usb.fit.summary
.....................\usrp_inband_usb.flow.rpt
.....................\usrp_inband_usb.map.rpt
.....................\usrp_inband_usb.map.smsg
.....................\usrp_inband_usb.map.summary
.....................\usrp_inband_usb.pin
.....................\usrp_inband_usb.psf
.....................\usrp_inband_usb.qpf
.....................\usrp_inband_usb.qsf
.....................\usrp_inband_usb.qws
.....................\usrp_inband_usb.rbf
.....................\usrp_inband_usb.sdc
.....................\usrp_inband_usb.sof
.....................\usrp_inband_usb.tan.rpt
.....................\usrp_inband_usb.tan.summary
.....................\usrp_inband_usb.v
.....................\usrp_inband_usb.v.bak
.....................\usrp_inband_usb_assignment_defaults.qdf
usrp_inband_usb_WORKS
include\.svn
.......\....\prop-base
.......\....\props
.......\....\text-base
.......\....\tmp
.......\....\...\prop-base
.......\....\...\props
.......\....\...\text-base
.......\common_config_1rxhb_1tx.vh
.......\common_config_2rxhb_0tx.vh
.......\common_config_2rxhb_2tx.vh
.......\common_config_2rx_0tx.vh
.......\common_config_4rx_0tx.vh
.......\common_config_bottom.vh
include
..band_lib\.svn
..........\....\prop-base
..........\....\props
..........\....\text-base
..........\....\tmp
..........\....\...\prop-base
..........\....\...\props
..........\....\...\text-base
..........\channel_demux.v
..........\channel_ram.v
..........\chan_fifo_reader.v
..........\cmd_reader.v
..........\packet_builder.v
..........\register_io.v
..........\rx_buffer_inband.v
..........\tx_buffer_inband.v
..........\tx_packer.v
..........\usb_packet_fifo.v
inband_lib
megacells\.svn
.........\....\prop-base
.........\....\props
.........\....\text-base
.........\....\tmp
.........\....\...\prop-base
.........\....\...\props
.........\....\...\text-base
.........\accum32.bsf
.........\accum32.cmp
.........\accum32.inc
.........\accum32.v
.........\accum32_bb.v
.........\accum32_inst.v
.........\add32.bsf
.........\add32.cmp
.........\add32.inc
.........\add32.v
.........\add32_bb.v
.........\add32_inst.v
.........\addsub16.bsf
.........\addsub16.cmp
.........\addsub16.inc
.........\addsub16.v
.........\addsub16_bb.v
.........\addsub16_inst.v
.........\bustri.bsf
.........\bustri.cmp
.........\bustri.inc

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