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VHDL-FPGA-Verilog
Title:
32_bit_complex_multiplier
Download
Category:
VHDL-FPGA-Verilog
Tags:
[VHDL]
[源码]
File Size:
8kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
wilson
Description:
32_bit complex multiplier,written in verilog HDL.
Downloaders recently:
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More information of uploader wilson
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To Search:
complex verilog
32 MULTIPLIER VERILOG
[
32bits_float_muliplier
] - 32-bit floating-point multiplier design,
[
cmultip
] - With VERILOG HDL achieve savings of 16-b
[
mult
] - 32-bit floating point multiplier source
[
Verilog-float-mutiplier
] - 32 float mutiplier
[
CCMU
] - Code is a complex multiplier, two comple
File list
(Check if you may need any files):
com_mult.v compressor.v mul_16.v testbench.v adder_32.v
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