Search - EPM7128SLC84-10

[Other resource] cpld_bus

Description: CPLD的VerilogHDL总线代码,在EPM7128SLC84-10+Quartus4平台上运行通过.-CPLD bus Verilog HDL code, the PLD-10 Quartus4 platform to run through.
Platform: | Size: 218582 | Author: hamlemon | Hits:

[Other resource] EPM7128SLC84-10chengxushili

Description: CPLD程序，ALTERA公司的EPM7128SLC84-10,PLCC84封装，已经调试过的程序，包含仿真文件，波形文件，VHDL语言程序，电路图以及PCB板和系统原理图，非常有用，尤其是初学EDA和CPLD、FPGA器件的人
Platform: | Size: 156083 | Author: xiaobo | Hits:

[VHDL-FPGA-Verilog] verilogled

Description: cpld-epm7128stc100-10驱动四位LED结果显示1234-cpld- epm7128stc100-10 drive four LED 1234 results
Platform: | Size: 197632 | Author: 章风 | Hits:

[VHDL-FPGA-Verilog] EPM7128SLC84-10chengxushili

Description: CPLD程序，ALTERA公司的EPM7128SLC84-10,PLCC84封装，已经调试过的程序，包含仿真文件，波形文件，VHDL语言程序，电路图以及PCB板和系统原理图，非常有用，尤其是初学EDA和CPLD、FPGA器件的人-CPLD procedures, ALTERA Corporation EPM7128SLC84-10, PLCC84 package, has been testing the procedure, including the simulation files, wave files, VHDL language program, circuit boards and systems, as well as PCB schematics, very useful, especially the beginner EDA and the CPLD, FPGA devices were
Platform: | Size: 155648 | Author: xiaobo | Hits:

[Software Engineering] pld

Description: 利用QuartusII的"MegaWizard Plug-In Manager", 设计输入数据宽度是4bit的ADD、SUB、MULT、DIVIDE、COMPARE 把它们作为一个project,DEVICE选用EPF10K70RC240-4，对它们进行时序仿真，将仿真波形（输入输出选用group）在一页纸上打印出来。 2.利用QuartusII的"MegaWizard Plug-In Manager"中的LPM_COUNTER，设计一个20bit的up_only COUNTER, 要求该COUNTER在FE0FA和FFFFF之间自动循环计数；分析该COUNTER在EPM7128SLC84-7、EPM7128SLC84-10、和EPF10K70RC240-2、 EPF10K70RC240-4几种芯片中的最大工作频率；请将计数器的输出值在FFFFC--FE0FF之间的仿真波形打印出来（仅EPF10K70RC240-4芯片,最大允许Clock频率下）。-QuartusII use the MegaWizard Plug-In Manager , the design of the input data width is 4bit the ADD, SUB, MULT, DIVIDE, COMPARE them as a project, DEVICE selected EPF10K70RC240-4, on their timing simulation, the simulation waveform (input output selected group) in a paper print out. 2. QuartusII use the MegaWizard Plug-In Manager in LPM_COUNTER, the design of a 20bit of up_only COUNTER, requested that the COUNTER in FE0FA and automatic cycle count between FFFFF analysis of the COUNTER in EPM7128SLC84-7, EPM7128SLC84-10, and EPF10K70RC240-2, EPF10K70RC240-4 Several of the largest chip operating frequency I would be grateful if the output value of counter FFFFC- FE0FF simulation waveform between the print out (only EPF10K70RC240-4 chips, the maximum allowable Clock frequency).
Platform: | Size: 31744 | Author: 李侠 | Hits:

[VHDL-FPGA-Verilog] PS_2

Description: 此模块用于"PS/2接口的鼠标或键盘"与"具有外部读写的8位并口单片机"双向通信模块. Verilog HDL语言编写,在Quartus II 8.1 (32-Bit)软件中编译,并下载至EPM7128SLC84-10芯片中通过. 文件中有详细的注解. 此模块具有对于PS/2时钟和数据线的滤波功能,这样减少外部干扰，保证通信的可靠性！ -This module for the "PS/2 mouse or keyboard interface" and "read and write with an external parallel port single-chip 8" two-way communication module. Verilog HDL language, in the Quartus II 8.1 (32-Bit) software compiler and downloaded to EPM7128SLC84-10 chip through. document detailed comments. This module has the PS/2 clock and data line filtering, so that to reduce the external interference, and ensure the reliability of communication!
Platform: | Size: 5120 | Author: yuantielei | Hits:

[VHDL-FPGA-Verilog] freqm

Description: 以CPLD器件EPM7128SLC84-15为核心实现的简易数字频率计，采用在一定时间内对数字脉冲计数的方法，可直接测量TTL电平的数字脉冲信号的频率、周期和脉宽。其他一些信号可经过信号预处理电路变换后测量。量程：1Hz～999999Hz 输入信号：（1）TTL电平数字脉冲信号；（2）方波/正弦波，幅度0.5~5V 显示：七段数码管显示频率（Hz）和周期/脉宽（us）控制：两个拨码开关切换三种工作模式：测频率，测周期，测脉宽-Frequency Counter realized with Altera EPM7128SLC84-15. It can measure frequecy, cycle and pulse width of TTL sigals.
Platform: | Size: 1053696 | Author: tom | Hits:

[Software Engineering] CPLD_KEYBOARD

Description: 本设计是用VHDL语言来实现的基于RS232按位串行通信总线的行列式矩阵键盘接口电路，具有复位和串行数据的接收与发送功能，根据发光二极管led0—led2的显示状态可判断芯片的工作情况；实现所有电路功能的程序均是在美国 ALTERA公司生产的具有现场可编程功能的芯片EPM7128SLC84-15上调试通过的。该电路的设计贴近生活，实用性强，制成芯片后可作为一般的PC机键盘与主机的接口使用。 -The design is based on VHDL language to achieve bit serial RS232 communication bus according to the determinant of matrix keyboard interface circuit with a reset, and serial data reception and transmission capabilities, according to light-emitting diode display led0-led2 status can be judged chip work to achieve all the circuit functions of the program are produced in the United States has ALTERA Field Programmable functions EPM7128SLC84-15 on-chip debug passed. The circuit design of daily life, practical, post-produced chips can be used as a general PC, the keyboard and the host interface.
Platform: | Size: 67584 | Author: jalon | Hits:

[VHDL-FPGA-Verilog] PLCC84_Socket_mdy

Description: PLCC84 插座的封装，例如cpld芯片EPM7128slc84-PLCC84 socket package, for example, and so on cpld chip EPM7128slc84
Platform: | Size: 4096 | Author: xue_1986 | Hits:

[VHDL-FPGA-Verilog] PS2

Description: 此模块用于PS/2接口与单片机相互通信PS/2接口与8位并口通信模块用于EPM7128SLC84-10芯片实验已通过-This module for PS/2 interface to communicate with the MCU PS/2 interface and 8-bit parallel communication module for EPM7128SLC84-10 chip has passed the test
Platform: | Size: 3072 | Author: EliCao | Hits:

[SCM] mydds

Description: 统利用单片机89C52与CPLD（EPM7128SLC84-15）结合，采用DDFS（直接频率数字频率合成）技术，辅以必要的模拟电路，构成一个波形稳定、精度较高的信号发生器。单片机控制频率、幅度步进，LCD实时显示相关信息，CPLD集成了-System using 89C52 microcontroller with CPLD (EPM7128SLC84-15) combined with DDFS (direct digital synthesis frequency) technology, combined with the analog circuitry necessary to form a waveform stability and high precision signal generator. SCM control the frequency, amplitude step, LCD display relevant information in real time, CPLD incorporates
Platform: | Size: 1802240 | Author: 吴伟 | Hits:

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