Description: 本系统以51单片机及FPGA为控制核心，由正弦信号发生模块、功率放大模块、调幅（AM）、调频（FM）模块、数字键控（ASK，PSK）模块以及测试信号发生模块组成-The system of 51 single-chip and FPGA for the control of the core module by the sinusoidal signal, power amplifier module, AM (AM), frequency modulation (FM) module, digital keying (ASK, PSK) signal modules and test modules
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Size: 105472 |
Author:123 |
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Description: 基于vhdl的三相信号源，可任意置频率和相位，还有调频输出模式，可以输出调频波-Vhdl-based three-phase signal source can be arbitrary frequency and phase of home, as well as frequency modulation output mode, you can output FM wave Platform: |
Size: 1084416 |
Author:rd |
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Description: 基于DDS的调频调相 通过改变频率控制字来控制 程序编译过 搭过硬件 可以实现-FM Based on DDS phase modulation by changing the frequency control word to control the program compiled the hardware can be achieved take-off Platform: |
Size: 459776 |
Author:梁梁 |
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Description: many matlab code with Fftseq ,uniform to gauss
AM DSB FM modulation-many matlab code with Fftseq ,uniform to gauss
AM DSB FM modulation Platform: |
Size: 444416 |
Author:allen |
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Description: 使用Verilog HDL语言实现的一个DDS，可以发生0-10Mhz正弦波、方波、三角波，频率步进可调，FM调制、AM调制，调制度可调。DA芯片为8位并行，160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjustable modulation. DA-chip 8-bit parallel, 160MHz Platform: |
Size: 1638400 |
Author:nostalgia |
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Description: 在quartus ii下完成的用VHDL语言编写的数字式调频BPSK的调制，其中DDS和成型滤波使用ip核完成-Accomplished in quartus ii the use of VHDL language digital FM BPSK modulation, which use the ip filter DDS and forming complete nuclear Platform: |
Size: 326656 |
Author: |
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Search - FM modulation VHDL