Search - FPGA VERILOG DA

[DSP program] TMS320C54x DSP 的cpu和外围设备

Description: 针对在FPGA中实现FIR滤波器的关键--乘法运算的高效实现进行了研究，给了了将乘法化为查表的DA算法，并采用这一算法设计了FIR滤波器。通过FPGA仿零点验证，证明了这一方法是可行和高效的，其实现的滤波器的性能优于用DSP和传统方法实现FIR滤波器。最后介绍整数的CSD表示和还处于研究阶段的根据FPGA实现的要求改进的最优表示。-view of the FPGA FIR filters achieve the key-- the multiplication Efficient Implementation of research, to the multiplication of the DA into Lookup algorithm, and using the algorithm design of the FIR filter. FPGA through imitation 0.1 certification proves that the method is feasible and efficient, achieve superior filter performance DSP and traditional FIR filter method. Finally, integral and said the CSD is still in the research stage on the basis of FPGA requirements of the optimal said.
Platform: | Size: 1424384 | Author: 呈一 | Hits:

[VHDL-FPGA-Verilog] FPGA-based-DAC

Description: 用fpga实现的DA转换器，有说明和源码，VDHL文件。 A PLD Based Delta-Sigma DAC Delta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinary performance and low cost of today s audio CD players. The simplest Delta-Sigma DAC consists of a Delta-Sigma modulator and a one bit DAC. Since, both of these components can be realized using digital circuits, it is possible to implement a low precision Delta-Sigma DAC using a PLD.-Using FPGA to achieve the DA converter, has descriptions and source code, VDHL document. A PLD Based Delta-Sigma DACDelta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinaryperformance and low cost of today s audio CDplayers. The simplest Delta-Sigma DAC consists of aDelta-Sigma modulator and a one bit DAC. Since , both of these components can be realized usingdigital circuits, it is possible to implement a lowprecision Delta-Sigma DAC using a PLD.
Platform: | Size: 58368 | Author: 开心 | Hits:

[VHDL-FPGA-Verilog] tlc5615

Description: TLC5615串行DA的驱动接口,采用verilog编程-TLC5615 driver DA serial interface using verilog programming
Platform: | Size: 317440 | Author: 田文军 | Hits:

[VHDL-FPGA-Verilog] DA

Description: FPGA控制DAC2807的源文件，Verilog。附有简单文档-FPGA control DAC2807 source, Verilog. A simple document
Platform: | Size: 1629184 | Author: 柴佳 | Hits:

[VHDL-FPGA-Verilog] DA

Description: 采用Verilog在FPGA上实现一阶Σ-Δ DAC，仿真和实际验证都正确，基本可以达到16位DAC的信噪比
Platform: | Size: 15360 | Author: 陈阳 | Hits:

[Com Port] serial_adda

Description: 硬件语言描述串行DA和AD转换，FPGA控制。能够很好的实现高精度的模数数模转换-verilog description of the serial DA and AD conversion, FPGA control.
Platform: | Size: 2048 | Author: 杨明 | Hits:

[VHDL-FPGA-Verilog] PWM_DA

Description: 可以产生PWM波形文件，熟悉基于FPGA的开发流程自己写的程序-PWM waveform files can be generated, FPGA-based development process familiar to write their own programs
Platform: | Size: 196608 | Author: 冯超 | Hits:

[VHDL-FPGA-Verilog] dac

Description: DA芯片输出控制 SPI协议只写不读 FPGA用 verilog-DA-chip SPI protocol output control does not read write-only FPGA with verilog
Platform: | Size: 1024 | Author: wuzhongpeng | Hits:

[VHDL-FPGA-Verilog] ad_da_ctr

Description: 基于FPGA的ad和da转换Verilog代码，FPGA采用ep2c5芯片，做成异步fifo，ad芯片采用TI的ths1230,da芯片采用TI的TLV5619，仿真结果基本正确。-FPGA-based ad and da conversion Verilog code, FPGA using ep2c5 chip, made ??of asynchronous fifo, ad-chip using TI s ths1230, da chip uses TI s TLV5619, simulation results are basically correct.
Platform: | Size: 2299904 | Author: ych | Hits:

[VHDL-FPGA-Verilog] DAC8812

Description: DA转换，Verilog HDL 编的，可实现DA转化。DA芯片用的是DAC8812，实现16位数模转化。-DA conversion, Verilog HDL code, the DA conversion can be achieved. DA-chip using a DAC8812, 16-bit analog-to achieve transformation.
Platform: | Size: 674816 | Author: jackosn | Hits:

[VHDL-FPGA-Verilog] Verilog-hdlFPGA

Description: 关于FPGA的提高篇，Verilog HDL语言写的，包含LCD控制VHDL程序与仿真，AD/DA，MASK，FSK，PSK，正弦波发生器，等等经典程序-Articles on improving the FPGA, Verilog HDL language, and includes LCD control procedures and VHDL simulation, AD/DA, MASK, FSK, PSK, sine wave generator, and so the classic procedure
Platform: | Size: 1181696 | Author: chenfeihu | Hits:

[VHDL-FPGA-Verilog] my6

Description: fpga verilog程序，实现诸多模块功能，包括，数码管显示，与ad，da通信，与mcu通信，以便通过mcu将高速ad值显示在lcd显示器上。-fpga verilog program to achieve a number of modules, including, digital display, with the ad, da communication, communication with mcu, mcu high-speed through the ad to the value displayed on the lcd display.
Platform: | Size: 3620864 | Author: liu | Hits:

[VHDL-FPGA-Verilog] MY-DDS

Description: 利用altera公司的FPGA使用verilog语言实现DDS功能外加DA 可将数字信号转换成标准正弦信号-Altera FPGA use verilog language of DDS functions plus DA converts digital signals into a standard sine signal
Platform: | Size: 1305600 | Author: 李枫 | Hits:

[VHDL-FPGA-Verilog] AD_FIFO

Description: 简单的Verilog程序，针对音频实验板的AD到DA调通试验，下载执行前请按照自己试验环境更改设置-Simple Verilog program for test the AD to DA loop of universal audio test platform. Please configure it according to the test environment before download and implement the program to FPGA
Platform: | Size: 3955712 | Author: ZHU XIANGYU | Hits:

[Other] da_fir

Description: 基于FPGA分布式算法FIR滤波器verilog代码（本人小论文代码，通过验证）本文提出一种新的FIR滤波器FPGA实现方法。讨论了分布式算法原理，并提出了基于分布式算法FIR滤波器的实现方法。通过改进型分布式算法结构减少硬件资源消耗，用流水线技术提高运算速度，采用分割查找表方法减小存储规模，并在Matlab和Modelsim仿真平台得到验证。为了节省FPGA逻辑资源、提高系统速度，设计中引入了分布式算法实现有限脉冲响应滤波器(Finite Impulse Response, FIR)。由于FIR滤波器在实现上主要是完成乘累加MAC的功能，采用传统MAC算法设计FIR滤波器将消耗大量硬件资源。而采用分布式算法 (Distributed Arithmetic, DA)，将MAC运算转化为查找表(Look-Up-Table, LUT)输出，不仅能在硬件规模上得到改善，而且更易通过实现流水线设计来提高速度。因此本文采用分布式算法设计一个可配置的FIR滤波器，并以31阶的低通FIR滤波器为例说明分布式算法滤波器结构。- FPGA verilog
Platform: | Size: 6144 | Author: 石康 | Hits:

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[DSP program] TMS320C54x DSP 的cpu和外围设备

[VHDL-FPGA-Verilog] FPGA-based-DAC

[VHDL-FPGA-Verilog] tlc5615

[VHDL-FPGA-Verilog] DA

[VHDL-FPGA-Verilog] DA

[Com Port] serial_adda

[VHDL-FPGA-Verilog] PWM_DA

[VHDL-FPGA-Verilog] dac

[VHDL-FPGA-Verilog] ad_da_ctr

[VHDL-FPGA-Verilog] DAC8812

[VHDL-FPGA-Verilog] Verilog-hdlFPGA

[VHDL-FPGA-Verilog] my6

[VHDL-FPGA-Verilog] MY-DDS

[VHDL-FPGA-Verilog] AD_FIFO

[Other] da_fir

[Other Embeded program] FIR32

[VHDL-FPGA-Verilog] DA_TLC5615

[VHDL-FPGA-Verilog] yuanma

[VHDL-FPGA-Verilog] DA

[VHDL-FPGA-Verilog] test_ADC

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