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[VHDL-FPGA-Verilog] StateCAD独立运行版

Description: 状态机设计工具，ISE11以后都没有集成了。这个版本可独立运行，不需要ISE
Platform: | Size: 3567928 | Author: oceanx | Hits:

[Windows Develop] ISE

Description: XINILX最新开发软件版本,ISE11.1,这里的资源最好,比讯雷快得多 -XINILX latest development software version, ISE11.1, where the resources of the best, much faster than the Thunder
Platform: | Size: 477184 | Author: 汪翔 | Hits:

[VHDL-FPGA-Verilog] ise_11[1].3_licgen

Description: ise11.3的，请用来学习又没有钱的朋友使用，不要外传，谢谢！-ise11.3, please no money is used to study the use of a friend, not rumor, thank you!
Platform: | Size: 527360 | Author: 磊 | Hits:

[Books] ise11tut

Description: ISE教程 详细的说明了ISE11.1的使用 是初学ISE的好帮手-ISE XILINX
Platform: | Size: 3070976 | Author: 苏文天 | Hits:

[VHDL-FPGA-Verilog] ml505_mig_design

Description: Xilinx开发板ML505的DDRII示例程序，使用Verilog，调用MIG，编译环境ISE11.1-Xilinx ML505 development board of DDRII sample program, using Verilog, called MIG, build environment ISE11.1
Platform: | Size: 9332736 | Author: 黑羽·X | Hits:

[VHDL-FPGA-Verilog] lock_wsh-v2

Description: FPGA开发，电子密码锁，使用ISE11.1开发而成-The electronic lock
Platform: | Size: 478208 | Author: 沐扬 | Hits:

[VHDL-FPGA-Verilog] dds

Description: verilog 硬件语言实现DDS，使用ise11.1和modelsim se6.5仿真测试-verilog hardware language DDS, using the simulation test ise11.1 and modelsim se6.5
Platform: | Size: 2594816 | Author: linzi | Hits:

[VHDL-FPGA-Verilog] div_any_nodd

Description: 使用verilog硬件语言实现任意奇数分频，使用ise11.1和modelsim仿真测试-Verilog language using any odd hardware divide, and the modelsim simulation testing using ise11.1
Platform: | Size: 509952 | Author: linzi | Hits:

[VHDL-FPGA-Verilog] div_n_0_5

Description: 使用verilog实现任意奇数n+0.5分频，使用ise11.1和modelsim se6.5仿真测试-Using an arbitrary odd number n+0.5 verilog divide, the use of simulation testing ise11.1 and modelsim se6.5
Platform: | Size: 788480 | Author: linzi | Hits:

[Other] ise_11[1].3_licgen

Description: Xilinx ISE11破解软件（支持xp win7）-Xilinx ISE11 cracking software (to support xp win7)
Platform: | Size: 477184 | Author: ycs | Hits:

[VHDL-FPGA-Verilog] fir_lowpass

Description: 硬件语言实现数字低通滤波器，使用ise11.1和modelsim se6.5 仿真测试-Hardware language digital low pass filter, the use of simulation testing ise11.1 and modelsim se6.5
Platform: | Size: 545792 | Author: linzi | Hits:

[VHDL-FPGA-Verilog] license_ISE_11_to_12_AVNET-yyy

Description: ise11.1的license，包括了fifo等IP核，谢谢大家的光顾。-ise11.1‘s license which provided some ip like fifo.
Platform: | Size: 478208 | Author: yyy | Hits:

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