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Description: 关于DDR，DDR2,DDR3和MMC的标准规范。-On the DDR, DDR2, DDR3 and the MMC standards.
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Size: 13941760 |
Author: 崔海群 |
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Description: jeted 组织的ＤＤＲ２ ＲＡＭ 文档，希望对你有所帮助-jeted organizations document DDR2 RAM, and they hope to help you
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Size: 2774016 |
Author: feng |
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Description: TMS320C6711的上电自检 This source code is ultimately used to create a JEDEC programming file used
* to program the Flash ROM on the C6711 DSK.-TMS320C6711 Power-On Self Test of This source code is ultimately used to create a JEDEC programming file used* to program the Flash ROM on the C6711 DSK.
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Size: 45056 |
Author: 黄河 |
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Description: Update Jedec Specification
Common Flash Interface (CFI)
JESD68.01
(Minor Revision to JESD68, September 1999) -Update Jedec SpecificationCommon Flash Interface (CFI) JESD68.01 (Minor Revision to JESD68, September 1999)
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Size: 193536 |
Author: Scott Shu |
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Description: The AT24C512 provides 524,288 bits of serial electrically erasable and programmable
read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device鈥檚
cascadable feature allows up to four devices to share a common two-wire bus. The
device is optimized for use in many industrial and commercial applications where lowpower
and low-voltage operation are essential. The devices are available in spacesaving
8-pin PDIP, 8-lead EIAJ SOIC, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead
Leadless Array (LAP), and 8-lead SAP packages. In addition, the entire family is available
in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 3.6V) versions.
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Size: 480256 |
Author: SAP |
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Description: MMC 4.1标准，源自JEDEC，对于MMC CARD读写有相当重要的指导意义。-MMC 4.1 standard from JEDEC, has read and write to MMC CARD important guiding significance.
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Size: 1398784 |
Author: 李 |
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Description: 这是xilinx应用指南xapp851的中文版本。本应用指南描述了在 Virtex™ -5 器件中实现的 200 MHz DDR SDRAM （JEDEC DDR400
(PC3200) 标准）控制器。本设计实现使用 IDELAY 单元调整读数据时序。读数据时序校准和调整在此控制器中完成。-This is the xilinx application note xapp851 the Chinese version. This application note describes the Virtex ™ -5 devices to achieve 200 MHz DDR SDRAM (JEDEC DDR400
(PC3200) standard) controller. The Design and Implementation of the use of IDELAY unit to adjust read data timing. Reading the data calibration and adjust the timing for completion of this controller.
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Size: 408576 |
Author: 陈阳 |
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Description: 实现了Jedec标准中对超薄膜氧化层的MOS电容的Time-zero可靠性测试方法。可直接用于半导体器件可靠性测试中-a realization of Time-zero dilectric breakdown according to Jedec standard,which can use to achieve reliability of wafer
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Size: 37888 |
Author: zhaoanyu |
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Description: component vhdl description
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Size: 1024 |
Author: noura |
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Description: DDR SDRAM的JEDEC标准，对DDR SDRAM的编程学习者有帮助。-The JEDEC standards for DDR SDRAM, DDR SDRAM programming for learners help.
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Size: 840704 |
Author: 李娟 |
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Description: eMMC标准：JEDEC Standard No. 84-A441-Embedded MultiMediaCard(e• MMC) e• MMC/Card Product Standard, High Capacity,
including Reliable Write, Boot, Sleep Modes, Dual Data Rate, Multiple Partitions Supports,
Security Enhancement, Background Operation and High Priority Interrupt (MMCA, 4.41)
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Size: 1898496 |
Author: 徐铭泽 |
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Description: mmc spec v4.2.jedec 网站上下下来的，不用再自己找了。用于inand的驱动优化等。-mmc spec v4.2.jedec site from top to bottom down, no longer found himself.
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Size: 1898496 |
Author: lxf |
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Description: ddr2 标准，详细描述了DDR2 的时序要求，详见http://www.jedec.org/-ddr2 spec for details :http://www.jedec.org/
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Size: 1802240 |
Author: bluefeifei |
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Description: DDR4由JEDEC最新发布的英文协议，浅显易懂，希望对开发的同仁提供帮助-DDR4 easy to understand, I hope to help colleagues developed by JEDEC latest English agreement
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Size: 3881984 |
Author: 爱迪生法 |
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Description: 这样的设计显示，如何PROSPICE实现PLD的支持。 PLD器件建模fusemap水平，
使用一个JEDEC fusemap文件到指定熔丝编程。这可以让你使用你自己选择的PLD编译器
-This design display, how PROSPICE to the PLD support. The PLD device modeling fusemap level, using a JEDEC fusemap file to the specified fuse programming. This allows you to use your own choice of PLD compiler
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Size: 9216 |
Author: 任丹丹 |
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Description: driver for Jedec JC42.4 compliant temperature sensors.
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Size: 4096 |
Author: wouowjo3269 |
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Description: Mapping of a custom board with both AMD CFI and JEDEC flash in partitions. Config with both CFI and JEDEC device support.- Mapping of a custom board with both AMD CFI and JEDEC flash in partitions. Config with both CFI and JEDEC device support.
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Size: 2048 |
Author: eapingoin |
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Description: JEDEC标准族，可以通过该文档快速查询到需要的标准-The JEDEC family of standards, can through the document query to the required standard
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Size: 12288 |
Author: james |
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Description: DDR4 SDRAM Specifications from JEDEC STANDARD. ball/signal assignments. The purpose of this Standard is to define the minimum set of requirements for JEDEC compliant 2 Gb through 16 Gb for x4, x8, and x16 DDR4 SDRAM devices. This standard was created based on the DDR3 standard (JESD79-3) and some aspects of the DDR and DDR2 standards (JESD79, JESD79-2).
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Size: 1824071 |
Author: bdebug@gmail.com |
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Description: JESD79-5B DDR5 SDRAM-2022 JEDEC
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Size: 452649 |
Author: cdm*** |
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