Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - LFSR vhdl

Search list

[Other resource] CA-vfdl

Description: GPS C/A码 发生器 LFSR 源代码 VHDL 语言-GPS C / A code generator LFSR VHDL source code
Platform: | Size: 1147 | Author: wuhao | Hits:

[Communication] 伪随机序列

Description: 线形反馈移位寄存器（LFSR)是数字系统中一个重要的结构，本程序可以自动产生AHDL,VHDL,Verilog的源代码及电路原理图。程序可以运行在win98/2000/NT平台-linear feedback shift register (LFSR) digital system is an important structure, the process can be automatically generated AHDL, VHDL, Verilog source code and circuit schematics. Procedures can run on platforms win98/2000/NT
Platform: | Size: 162816 | Author: 夏沫 | Hits:

[DSP program] CA-vfdl

Description: GPS C/A码 发生器 LFSR 源代码 VHDL 语言-GPS C/A code generator LFSR VHDL source code
Platform: | Size: 1024 | Author: wuhao | Hits:

[VHDL-FPGA-Verilog] LFSR

Description: 自动生成线形反馈移位寄存器的各种HDL源代码和原理图的工具-Automatic generation of linear feedback shift register of a variety of HDL source code and schematic tools
Platform: | Size: 162816 | Author: zx | Hits:

[VHDL-FPGA-Verilog] rng

Description: verilog编写随机数产生源程序，在硬件电路设计中应用广泛。本程序是在LFSR and a CASR 基础上实现的-random number generator to prepare Verilog source code, in the hardware circuit design applications. This procedure is in the LFSR and a CASR based on the
Platform: | Size: 94208 | Author: Alex | Hits:

[VHDL-FPGA-Verilog] profiles

Description: source code of counter,ram,lfsr etc
Platform: | Size: 2048 | Author: narsimha | Hits:

[VHDL-FPGA-Verilog] LFSR

Description:
Platform: | Size: 1024 | Author: Viral | Hits:

[Software Engineering] 13105886-vhdl-lab-programs

Description: vhdl programme on lfsr
Platform: | Size: 289792 | Author: rahul | Hits:

[VHDL-FPGA-Verilog] LFSR

Description: LFSR模块，单个模块，实现移位寄存器，生成测试用pattern-LFSR
Platform: | Size: 2048 | Author: henin | Hits:

[Windows Develop] LFSR

Description: verilog实现的8阶伪随机序列发生器，文件包含了三种主要模块：控制模块，ROM模块，线性反馈移位寄存器（LFSR）模块。已经通过modelsim仿真验证。-verilog to achieve 8-order pseudo-random sequence generator, the file contains three main modules: control module, ROM modules, a linear feedback shift register (LFSR) module. Has passed modelsim simulation.
Platform: | Size: 870400 | Author: 风影 | Hits:

[VHDL-FPGA-Verilog] cdma

Description: vhdl code for flip-flop,lfsr
Platform: | Size: 104448 | Author: sandeep | Hits:

[VHDL-FPGA-Verilog] BIST

Description: A simple BIST in VHDL. It contains a LFSR with an SISR.
Platform: | Size: 405504 | Author: bommeren | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: For the animal file: we built a system that took in a UAC code and output if the animals need vaccines and if we are in danger of being eaten Seven_segment Clock_Design : built a clock State_machine: RoboRacer game (r9-bit LFSR) For the Elevator assignment: built an elevator with 6 floor -For the animal file: we built a system that took in a UAC code and output if the animals need vaccines and if we are in danger of being eaten Seven_segment Clock_Design : built a clock State_machine: RoboRacer game (r9-bit LFSR) For the Elevator assignment: built an elevator with 6 floor
Platform: | Size: 1785856 | Author: Michael Ng | Hits:

[VHDL-FPGA-Verilog] CRC-Parallel-Computation

Description: 用软件实现CRC校验码计算很难满足高速数据通信的要求， 基于硬件的实现方法中， 有串行经典算法LFSR,电路以及由软件算法推导出来的其它各种并行计算方法。以经典的LFSR,电路为基础， 研究了按字节并行计算CRC校验码的原理.-Implemented in software CRC checksum calculation is difficult to meet the requirements of high-speed data communications, hardware-based implementations, there are classic serial algorithm LFSR, circuits and software algorithms derived from the other kinds of parallel computing. To the classic LFSR, circuit-based, study by the CRC byte parallel computing principles.
Platform: | Size: 205824 | Author: Geer | Hits:

[VHDL-FPGA-Verilog] lfsr

Description: the LFSR is coded in VHDL, using a structural description, which is instantiated as a separate component in the top-level design. Then we can get a random number by a pseudorandom number generator based on a linear feedback shift register (LFSR)
Platform: | Size: 2048 | Author: 宋臣 | Hits:

[Program doc] LFSR

Description: practical example using verilog and vhdl by xilinx
Platform: | Size: 854016 | Author: ali | Hits:

[Other] LFSR

Description: Linear-feedback shift register vhdl code
Platform: | Size: 25600 | Author: mahdi | Hits:

[Other] LFSR

Description: lfsr vhdl code ise matlab
Platform: | Size: 411648 | Author: masoudu | Hits:

[VHDL-FPGA-Verilog] vhdl_rand

Description: Linear Feedback Shift Register (LFSR)/Random number generator
Platform: | Size: 113664 | Author: sheldon01 | Hits:

[Other] LFSR

Description: lfsr vhdl code by hamid ghanbari
Platform: | Size: 12288 | Author: ghanbari1995 | Hits:
« 12 »

CodeBus www.codebus.net