Search - NCO verilog

[Embeded-SCM Develop] verilog实例 [43项]

Description: 嵌入式可编程器件CPLD的典型实例压缩包，共计43个源码文件。使用ALTERA的 Muxplus 软件即可编辑仿真相关软件可在教育网ftp下载[天网查询，有很多站点提供]-Embedded Programmable CPLD in a typical example of compressed, for a total of 43 source document. Altera Muxplus use the software can edit simulation software available from the Education Network ftp download [days Web inquiries, many sites provide]
Platform: | Size: 181248 | Author: 吴旭辉 | Hits:

[VHDL-FPGA-Verilog] frame_decode_and_encode

Description: 一个用Verilog编写的编帧、解帧及码速匹配的程序，相当经典-Verilog prepared with a series of frames, frames and solutions yards speed matching procedures, rather classic!
Platform: | Size: 3072 | Author: 李全 | Hits:

[VHDL-FPGA-Verilog] NCO_ip

Description: NCO的VHDL程序，是利用IP核生成的，超好的，快下吧-NCO of the VHDL process is the use of nuclear-generated IP, super good, fast, are you
Platform: | Size: 128000 | Author: 张俊 | Hits:

[source in ebook] nco

Description: 用VHDL语言写好得，直接可用NCO设计-VHDL language was used to write directly available NCO design
Platform: | Size: 34816 | Author: long | Hits:

[VHDL-FPGA-Verilog] RomNCO

Description: 基于NCO的数字控制振荡器。带测试程序，输出12位的COS和SIN波形。-Based on the digital control oscillator NCO. With test procedures, the output 12 of the COS and the SIN waveform.
Platform: | Size: 29696 | Author: 咚咚 | Hits:

[VHDL-FPGA-Verilog] NCO_based_rom

Description: 完整的基于ROM查找表的NCO 产生10位宽的正交信号-Integrity of the ROM-based lookup table of the NCO have 10-bit wide of the orthogonal signal
Platform: | Size: 86016 | Author: gsg | Hits:

[VHDL-FPGA-Verilog] 7941952NCO_sin

Description: NCO 代码设计使用VHDL语言-nco
Platform: | Size: 4096 | Author: lucifer | Hits:

[VHDL-FPGA-Verilog] RealizationofdigitaldownconversionbyFPGA

Description: 介绍在FPGA 器件上如何实现单通道数字下变频（DDC）系统。利用编写VHDL 程序和调用部分IP 核相结合的方法研究了数字下变频的FPGA 实现方法,并且完成了其主要模块的仿真和调试,并进行初步系统级验证。-Introduced in the FPGA device on how to achieve the single-channel digital down conversion (DDC) system. VHDL procedures and the use of the preparation of some call a combination of IP core method of the FPGA digital down conversion method, and completed its main modules of simulation and debugging, and initial system-level verification.
Platform: | Size: 162816 | Author: 于银 | Hits:

[DSP program] dspddc_R12p1

Description: 基于DSPbuilder搭建的DDC，里面包括CIC滤波器，FIR低通滤波器，HB半带滤波器，NCO等，实现了GC5016芯片的功能-DSPbuilder erected based on DDC, which include the CIC filter, FIR low-pass filter, HB half-band filter, NCO, etc. to achieve the function of the GC5016 chip
Platform: | Size: 17408 | Author: 郑程 | Hits:

[Other] Nco_gen

Description: NCO产生正余弦振荡波的matlab程序，很实用。-NCO generate cosine Sasser' s matlab program is very practical.
Platform: | Size: 1024 | Author: liujinghua | Hits:

[VHDL-FPGA-Verilog] LogicLock

Description: 实现数字混频，verilog与原理图混合编程-Digital mixer, verilog and mixed programming schematic
Platform: | Size: 3613696 | Author: 张旭 | Hits:

[VHDL-FPGA-Verilog] NCO

Description: 用verilog语言写的NCO，在quartus环境中应用-Verilog language written with NCO, quartus environment in the applications
Platform: | Size: 3072 | Author: 刘春 | Hits:

[GPS develop] Code_NCO.zip

Description: 码数控振荡器相位累加器的位数N为32,利用verilog HDL语言在Quartus II 9.1中具体实现了载波和码NCO的设计。,The code numerically controlled oscillator phase accumulator bits N 32 verilog HDL language in the concrete realization of the design of the carrier and code NCO Quartus II 9.1.
Platform: | Size: 1024 | Author: cc | Hits:

[VHDL-FPGA-Verilog] NCO

Description: 卫星导航接收机数控振荡器NCO模块 verilog程序完整版-verilog program about satellite navigation
Platform: | Size: 357376 | Author: liulaiwang | Hits:

[VHDL-FPGA-Verilog] NCO_test

Description: FPGA的压控振荡器NCO完整Verilog工程代码，测试输出1KHZ sin波。signaltap抓取没问题。-VCO NCO complete FPGA Verilog code engineering, test output 1KHZ sin wave. signaltap crawl no problem.
Platform: | Size: 9171968 | Author: allcot | Hits:

[Mathimatics-Numerical algorithms] cordic

Description: verilog编写的数字信号发生器NCO用CORDIC方法实现产生sin cos信号，流水线结构，简单实用。-verilog prepared by the digital signal generator NCO using CORDIC method implementation generate sin cos signal, pipelined architecture, simple and practical。
Platform: | Size: 1024 | Author: 李斌 | Hits:

[VHDL-FPGA-Verilog] NCO

Description: 用Verilog语言编写的数字振荡器，既可以通过频率控制字调整输出频率，也可以通过相位控制字调整其输出相位，已通过调试验证-Verilog language with the digital oscillator, both through the frequency control word to adjust the output frequency, you can also adjust the output phase through the phase control word, has been verified through debugging
Platform: | Size: 1024 | Author: houjunfeng | Hits:

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[Embeded-SCM Develop] verilog实例 [43项]

[VHDL-FPGA-Verilog] frame_decode_and_encode

[VHDL-FPGA-Verilog] NCO_ip

[source in ebook] nco

[VHDL-FPGA-Verilog] RomNCO

[VHDL-FPGA-Verilog] NCO_based_rom

[VHDL-FPGA-Verilog] 7941952NCO_sin

[VHDL-FPGA-Verilog] RealizationofdigitaldownconversionbyFPGA

[DSP program] dspddc_R12p1

[Other] Nco_gen

[VHDL-FPGA-Verilog] LogicLock

[VHDL-FPGA-Verilog] NCO

[GPS develop] Code_NCO.zip

[VHDL-FPGA-Verilog] NCO

[VHDL-FPGA-Verilog] NCO_test

[Mathimatics-Numerical algorithms] cordic

[VHDL-FPGA-Verilog] NCO

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