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[Windows Develop] plj

Description: 本程序为VHDL编写的频率计，测频范围从0.1Hz到1G-VHDL procedures for the preparation of the frequency meter, measuring frequency range from 0.1Hz to 1G
Platform: | Size: 7586 | Author: tmx | Hits:

[Other resource] plj

Description: 程序用VHDL实现： 利用一秒定时测量频率 并且显示，范围0~-VHDL 0~
Platform: | Size: 137191 | Author: 刘赛 | Hits:

[assembly language] plj

Description: 用AT89C51制作八位数字频率计源程序。
Platform: | Size: 6571 | Author: 肖绪东 | Hits:

[Parallel Port] plj

Description: 基于AT89C51 和 ZLG7289的频率计程序
Platform: | Size: 1012 | Author: 丁捷 | Hits:

[Other resource] PLJ

Description: 基于AT89C2051的频率计，包括源码和电路图
Platform: | Size: 69932 | Author: 陆楷 | Hits:

[Other resource] plj

Description: 主要方法和要求：（1）用汇编语言对定时器8253和中断控制器8259A编程计数、定时和中断，进行定时计数（在规定的时间内记录外部脉冲的数目），计算出频率，用LED数码管显示出来。
Platform: | Size: 3143 | Author: 阿晶 | Hits:

[Other resource] plj

Description: [frequent.rar] - 等精度频率计的设计，已经在实验箱上运行的。
Platform: | Size: 16474 | Author: luoliwen | Hits:

[Other resource] PLJ

Description: 很不错的频率计的设计，希望大家多多指教
Platform: | Size: 882 | Author: kandy | Hits:

[Other resource] PLJ-1.3

Description: 基于凌阳SPCE061A单片机的多功能测频测相仪
Platform: | Size: 26249 | Author: xhb | Hits:

[Other resource] plj

Description: 用2051制作的测试1HZ到1M的频率测试C程序
Platform: | Size: 93862 | Author: nbclj415 | Hits:

[Other resource] plj

Description: 等精度数字频率计 的一个工程---包括vhdl源程序和编译后产生的相关文件
Platform: | Size: 1838306 | Author: 吴晨光 | Hits:

[Windows Develop] plj

Description: 本程序为VHDL编写的频率计，测频范围从0.1Hz到1G-VHDL procedures for the preparation of the frequency meter, measuring frequency range from 0.1Hz to 1G
Platform: | Size: 7168 | Author: tmx | Hits:

[VHDL-FPGA-Verilog] plj

Description: 等精度数字频率计 的一个工程---包括vhdl源程序和编译后产生的相关文件-Such as precision digital frequency of a project- including VHDL source code and compile the relevant documents after
Platform: | Size: 1838080 | Author: 吴晨光 | Hits:

[VHDL-FPGA-Verilog] plj

Description: 设计数字频率计的程序及实验报告，可直接仿照本程序进行设计-Designed Digital Cymometer procedures and experimental reports, can be directly modeled on the process design
Platform: | Size: 144384 | Author: 唐光敏 | Hits:

[VHDL-FPGA-Verilog] plj

Description: 数字频率计是一种用来测试周期性变化信号工作频率的装置。其原理是在规定的单位时间（闸门时间）内，记录输入的脉冲的个数。我们可以通过改变记录脉冲的闸门时间来切换测频量程。本文利用EDA技术中的Max+plusⅡ作为开发工具,设计了基于FPGA的8位十进制频率计,并下载到在系统可编程实验板的EPF10K20TC144-4器件中测试实现了其功能。-Digital frequency meter is a kind of cyclical changes in the signal used to test the device operating frequency. The principle is that the specified unit of time (gate time), the record of the number of input pulses. We can change the record time to the gate pulse frequency measurement range switch. In this paper, the use of EDA technology Max+ plus Ⅱ as a development tool designed for FPGA-based 8-bit decimal frequency meter, and to download the experimental in-system programmable EPF10K20TC144-4 board test device to achieve its function.
Platform: | Size: 591872 | Author: 庄青青 | Hits:

[VHDL-FPGA-Verilog] plj

Description: 这是一个基于可编程逻辑器件的程序，用来实现自动转换量程频率计控制器，该程序在可以再仿真器上仿真实现-This is a programmable logic device based on the procedures used to automatically convert the frequency range of the controller, the program can be in the simulation simulator
Platform: | Size: 176128 | Author: jyb | Hits:

[VHDL-FPGA-Verilog] plj

Description: 基于FPGA的等精度数字频率计实现等精度的频率计-To achieve precision frequency meter, etc.
Platform: | Size: 122880 | Author: wangyuansong | Hits:

[SCM] plj

Description: 这是一个基于51单片机的频率计，本人已经试过。里面还有PROTEUS仿真图-This is a microcontroller based on 51 frequency counter, I have tried. There is also PROTEUS simulation diagram
Platform: | Size: 58368 | Author: 黄化 | Hits:

[VHDL-FPGA-Verilog] plj

Description: 数字频率计 在1秒内对被测信号进行计数，并将数据送至控制器，控制器根据数据自动选档，量程分为0--10KHz 、10KHz --100KHz 、100KHz --1MHz 三档。 数据采用记忆显示方式，即计数过程中不显示数据，待计数过程结束以后，显示计数结果，并将此显示结果保持到下一次计数结束。-Digital frequency meter in 1 second count of the measured signals and data sent to the controller, the controller automatically selected according to the data file range into 0- 10KHz, 10KHz- 100KHz, 100KHz- 1MHz third gear. Data using memory display, the counting process that does not display data until after the end of the counting process, the results show that counts, and this shows the results remain to the end of the next count.
Platform: | Size: 55296 | Author: xdq | Hits:

[VHDL-FPGA-Verilog] plj

Description: --文件名：PLJ.vhd。 --功能：4位显示的等精度频率计。 --最后修改日期：2004.4.14。 -- File Name: PLJ.vhd.- Function: 4 display of equal precision frequency meter.- Last modified date: 2004.4.14.
Platform: | Size: 1024 | Author: mao | Hits:
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