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[ARM-PowerPC-ColdFire-MIPS处理器

Description: 16-bit RISC CPU
Platform: | Size: 270238 | Author: xzhgch@163.com | Hits:

[OtherS3C44B0X中文技术文档

Description:

 

   
三星的S3C44B0X 16/32位RISC处理器被设计来为手持设备等提供一个低成本高性能的方案。
S3C44B0X提供以下配置:2.5V ARM7TDMI 内核带有8Kcache ;可选的internal SRAM;LCD Controller(最大支持256色STN,使用LCD专用DMA);2-ch UART with handshake(IrDA1.0, 16-byte FIFO) / 1-ch SIO 2-ch general DMAs / 2-ch peripheral DMAs with external request pins External memory controller (chip select logic, FP/ EDO/SDRAM controller) 5-ch PWM timers & 1-ch internal timerWatch Dog Timer71 general purpose I/O ports / 8-ch external interrupt source RTC with calendar function 8-ch 10-bit ADC 1-ch multi-master IIC-BUS controller 1-ch IIS-BUS controller Sync. SIO interface and On-chip clock generator with PLL.
S3C44B0X采用一种新的三星ARM CPU嵌入总线结构-SAMBA2,最大达66MHZ。

Platform: | Size: 78690 | Author: ssunshine | Hits:

[VHDL-FPGA-Verilogalu

Description: 16位RISC CPU的ALU,使用VHDL编写-16-bit RISC CPU
Platform: | Size: 2048 | Author: 李斌 | Hits:

[Windows CEPccard

Description: pccard driver s3c2440.The S3C2440A offers outstanding features with its CPU core, a 16/32-bit ARM920T RISC processor designed by Advanced RISC Machines, Ltd. The ARM920T implements MMU, AMBA BUS, and Harvard cache architecture with separate 16KB instruction and 16KB data caches, each with an 8-word line length.-pccard driver s3c2440.The S3C2440A offers outstanding features with its CPU core, a 16/32-bit ARM920T RISC processor designed by Advanced RISC Machines, Ltd. The ARM920T implements MMU, AMBA BUS, and Harvard cache architecture with separate 16KB instruction and 16KB data caches, each with an 8-word line length.
Platform: | Size: 27648 | Author: makku | Hits:

[Othercputest

Description: 自己刚写的一个RISC的cpu,位宽16,主要是测试其中的逻辑,数据宽度是一位,可以很容易扩展-Writing just one of their own RISC the cpu, bit 16, are testing one of the main logic, data width, a, can be easily extended
Platform: | Size: 21504 | Author: myliu | Hits:

[uCOSs1c33_uCos

Description: uCos在s1c33上的移植 S1C33 MCU EPSON最新的32位微处理器系列,专用于需要高级数据处理的便捷设备。 CPU性能 核心CPU 精工EPSON32位的RISC CPU,32位内部数据处理 33MHz 105条16位固定长度的指令 16个32位多用途的寄存器 在60MHZ操作下的最小指令执行时间为16.7ns 乘法、除法和MAC指令 内存 0~128K ROM 8K RAM 片内周边电路 晶振电路 32.769K~33MHz 定时器 8位6道 16位6道和带告警功能的时钟各1道 计数器 4道,可选择时钟同步系统、异步系统、或IrDA接口 A/D转换 10位8通道 DMA 4道高速DMA 128道IDMA 通用 I/O 13位输入端口和29位I/O端口 片内周边电路 可编程时钟产生器 Prescaler 8位可编程定时器 6道 16位可编程定时器 6道 时钟定时器 1道 串口 4道 I/O端口 13位+29位 A/D转换器 ADC 直接存储器存取 DMA -S1C33 MCU EPSON latest 32-bit microprocessor series, dedicated to the convenience needs of advanced data processing equipment. CPU performance Seiko EPSON32 bit core CPU RISC CPU, 32-bit internal data processing 33MHz 105 16-bit fixed length instruction 16 multi-purpose 32-bit registers In 60MHZ operation, the minimum instruction execution time of 16.7ns Multiplication, division and the MAC Directive Memory, 0 ~ 128K ROM 8K RAM On-chip peripheral circuits 32.769K ~ 33MHz crystal oscillator circuit Timer 8 6 16 6 and clock with alarm function of each one Counter 4, optional clock synchronous system, asynchronous systems, or IrDA interfaces A/D converter 10-bit 8-channel DMA 4 道 high-speed DMA 128 道 IDMA Universal I/O 13-bit input ports and 29 I/O ports On-chip peripheral circuits Programmable Clock Generator Prescaler 8-bit programmable timer 6 16-bit programmable timer 6 Clock Timer 1 Serial 4 I/O port 13+29 bit A/D converter ADC Direct
Platform: | Size: 10240 | Author: dupeng | Hits:

[VHDL-FPGA-Verilogcpu16

Description: 16位cpu设计vhdl源码。主要实现risc机器模型-16-bit cpu design code
Platform: | Size: 182272 | Author: peterloo | Hits:

[SCMMSP430F149

Description: The Texas Instruments MSP430 family of ultralow-power microcontrollers consist of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with five low power modes is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that attribute to maximum code efficiency. The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 6 μs.
Platform: | Size: 1013760 | Author: Ma | Hits:

[VHDL-FPGA-Verilogzxcpu

Description: 用VHDL语言设计了一个含10条指令的RISC处理器。假定主存可以在一个始终周期内完成依次读写操作且和CPU同步,系统使用一个主存单元。处理器指令字长16位,包含8个通用寄存器,1个16位的指令寄存器和一个16位的程序记数器。处理器的地址总线宽度16位。数据总线宽度16位,取指和数据访问均在一跳蝻数据总线。处理器支持包含LDA,STA,MOV,MVI,ADD,SUB,AND,OR,JZ,JMP十条指令。其中仅有LDA和STA是访存指令。-VHDL language design with a RISC processor with 10 instruction. Assume that main memory can be completed in one cycle is always followed and the CPU read and write operations and the synchronization system uses a main memory unit. 16-bit instruction word processor, including 8 general purpose registers, a 16-bit instruction register and a 16-bit program counter. Processor' s address bus width 16 bits. 16-bit data bus width, fetch and data access are in the hop hoppers data bus. Processor support includes LDA, STA, MOV, MVI, ADD, SUB, AND, OR, JZ, JMP ten instructions. LDA and STA is the only one memory access instructions.
Platform: | Size: 1076224 | Author: zhaoshu | Hits:

[VHDL-FPGA-Verilogrisc

Description: 16位cpu的各功能模块的源程序,经过FPGA仿真通过,希望能帮到你-16-bit cpu' s each functional module of the source, through the FPGA emulation by, hope you can help
Platform: | Size: 375808 | Author: 大成 | Hits:

[SCMsmdk2413_application_note_rev10

Description: SMDK2413 (Samsung MCU Development Kit) for S3C2413X is a platform that is suitable for code development of SAMSUNG s S3C2413X 16/32-bit RISC microcontroller (ARM926EJ-S) for hand-held devices and general applications. The S3C2413X consists of 16-/32-bit RISC (ARM926EJ-S) CPU core, separate 8KB instruction and 8KB data cache, MMU to handle virtual memory management, LCD controller (STN & TFT), NAND flash boot loader, System Manager (chip select logic and SDRAM controller), 3-ch UART, 4-ch DMA, 4-ch Timers with PWM, I/O ports, RTC, 8-ch 10-bit ADC and touch screen interface, IIC-BUS interface, IIS-BUS interface, USB host, USB device, SD host & multimedia card interface, ATA Interface, IrDA, Camera Interface, Watch Dog Timer, 2-ch SPI and PLL for clock generation. The SMDK2413 consists of S3C2413X, boot EEPROM (flash ROM), SDRAM, LCD interface, two serial communication ports, configuration switches, JTAG interface and status LEDs.
Platform: | Size: 2135040 | Author: fateme | Hits:

[VHDL-FPGA-VerilogRISC-CPU-design

Description: 16位RISC-CPU设计,高四位为操作码,低12位为地址,寻址空间位4KB。包含12条指令(预设16条指令),3个基本测试文件及其Modelsim仿真结果。-16-bit RISC-CPU design, the high four bits for the opcode, the lower 12 address, the address space of 4KB. Consists of 12 instructions (default 16 instructions), the three basic test file and Modelsim simulation results.
Platform: | Size: 413696 | Author: yu | Hits:

[source in ebook16-CISC-CPU-design

Description: 16位精简指令集的CPU设计,有完整的步骤和原程序可供学习-16-bit RISC CPU design, complete steps and the original program for learning
Platform: | Size: 699392 | Author: 何宗苗 | Hits:

[Industry researchCC430_Datasheet

Description: The Texas Instruments CC430 family of ultralow-power microcontroller system-on-chip (SoC) with integrated RF transceiver cores consists of several devices featuring different sets of peripherals targeted for a wide range of applications. The architecture, combined with five low-power modes, is optimized to achieve extended battery life in portable measurement applications. The device features the powerful MSP430 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency.
Platform: | Size: 1563648 | Author: dmimed | Hits:

[Software Engineering1121--MSP430FRAM

Description: 超低功耗微控制器德州仪器MSP430FR698x和MSP430FR598x家庭由多个设备具有不同的套外设。该体系结构,结合7种低功耗模式被优化以实现延长的电池寿命,例如在流量计量应用。该器件具有一个强大的16位RISC CPU,16位寄存器和有助于获得最大编码效率的常数发生器。-Ultra-low-power microcontroller family Texas Instruments MSP430FR698x and MSP430FR598x multiple devices with different sets of peripherals. The architecture, combined with 7 kinds of low-power mode is optimized to achieve extended battery life, for example, in flow measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers and help get the maximum coding efficiency constant generator.
Platform: | Size: 25719808 | Author: 侯波 | Hits:

[VHDL-FPGA-VerilogRISC-CPU

Description: 精简指令集 16位流水线CPU 可实现硬件模拟-16-bit pipelined RISC CPU hardware emulation can be achieved
Platform: | Size: 3587072 | Author: kk | Hits:

[Software EngineeringTMS470R1VF288

Description: The TMS470R1VF288(1) devices are members of the Texas Instruments TMS470R1x family of general- purpose16/32-bit reduced instruction set computer (RISC) microcontrollers. The VF288 microcontroller offers high performance tilizing the high-speed ARM7TDMI 16/32-bit RISC central processing unit (CPU), resulting in a high instruction throughput while maintaining greater code efficiency.
Platform: | Size: 759808 | Author: EXPPU | Hits:

[SCMmsp430g2553

Description: 德州仪器(TI) MSP430 系列超低功耗微控制器包含多种器件,它们特有面向多种应用的不同外设集。这种架构与 5 种低功耗模式相组合,专为在便携式测量应用中延长电池使用寿命而优化。该器件具有一个强大的16 位RISC CPU,16 位寄存器和有助于获得最大编码效率的常数发生器。数字控制振荡器(DCO) 可在不到1μs 的时间里完 成从低功耗模式至运行模式的唤醒。(The TI (TI) MSP430 family of ultra low power microcontrollers contain a wide variety of devices, which are unique to different peripherals for a wide variety of applications. This architecture and A combination of 5 low power modes optimized for extended battery life in portable measurement applications. The device features a powerful 16 bit RISC CPU, 16 bit registers, and constant generators that help maximize coding efficiency. The digitally controlled oscillator (DCO) can be completed in less than 1 s Wake up from low power mode to run mode.)
Platform: | Size: 1622016 | Author: fengye0133 | Hits:

[Documentsmsp430g2755

Description: 德克萨斯仪器MSP430系列超低功耗微控制器由几个设备组成。 针对不同应用程序的不同外设集。的体系结构,结合五低功耗 模式,优化实现延长电池寿命便携式测量应用。该设备具有 强大的16位RISC CPU,16位寄存器,以及有助于提高代码效率的常数生成器。 数字控制振荡器(DCO)允许唤醒从低功耗模式,在不到1μ美国主动模式(The TI (TI) MSP430 family of ultra low power microcontrollers contain a wide variety of devices, which are unique to different peripherals for a wide variety of applications. This architecture and A combination of 5 low power modes optimized for extended battery life in portable measurement applications. The device features a powerful 16 bit RISC CPU, 16 bit registers, and constant generators that help maximize coding efficiency. The digitally controlled oscillator (DCO) can be completed in less than 1 s Wake up from low power mode to run mode.)
Platform: | Size: 1315840 | Author: fengye0133 | Hits:

[Other systemsFaraday Mixed-size Placement Benchmarks [vlsi] [IC]

Description: ICCAD 2004 Faraday Mixed-size Benchmarks with routing information Faraday Corp. recently released three benchmarks, originally intended for comparisons between structured and conventional ASICs. We apply to these benchmarks a standard ASIC design flow to generate five mixed-size designs. Faraday benchmarks include three commonly-used functional blocks: (I) 16-bit DSP, (II) 32-bit RISC CPU and (III) DMA. Other details on these benchmarks such as the EDA Tools used by Faraday, implementation conditions, settings etc. can be found in on the faraday web-site. To minimize the impact of routing on the results of the accounted placement approaches, we avoid clock-tree generation and power routing in our flows. However, both clock-trees and power rails can be built on theses benchmarks. Following is the description of our ASIC flow which we used for generating the mixed-size benchmarks from the original netlists.
Platform: | Size: 7427884 | Author: ahimsafollower@gmail.com | Hits:

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