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[Compress-Decompress algrithms] H.265_X86_DEMO

Description: ZPAV（小名H265），凝集 形态，分形，模糊，小波，数字图象处理学 等数学精华， 我 感受到了她的威猛的能量，听到了她的呐喊！她如春雷， 震撼着 单薄数学（DCT+ME+HUFFMAN等）的MPEGxx和H26xx的古老统治！ ZPAV (H.265) 基本算法 ：V0,V6 用了 二维小波；V8 用了 三维小波；V9 用了 四维小波； P帧（ME） 使用了 小波域运动估计；声音(A0,A6,A8,A9), 运动矢量（MV） 使用了 广义小波。 ZPAV (H.265) 基本指标 ：测试版平均MIPS为50M；D1<704*576>；25帧/秒； 通话场景约50 Kbits/秒；影视场景约100 Kbits/秒；B帧间距为2，4帧；前背景压缩比为1:2 。 声音约 4 ~~~ 128 Kbits/秒。 ZPAV (H.265) 实现语言 ：C， MASM（MMX(X86)），DSP_ASM（DM64XX(TI)，pnxNNNN(PHILIPS)）， verilog（在开发中） 。
Platform: | Size: 2714774 | Author: 彭珍 | Hits:

[VHDL-FPGA-Verilog] CPLD读取ADS7886

Description:

CPLD读取Ti串行ADC芯片ADSL7886的Verilog代码


Platform: | Size: 709 | Author: agedgm | Hits:

[VHDL-FPGA-Verilog] DAC5687 interface

Description: TI DAC5687 interface of the verilog
Platform: | Size: 2699 | Author: jackking0204 | Hits:

[DSP program] MCBSP

Description: 有关TI的DSP芯片54X系列的多通道缓冲串行接口设置-on TI's DSP chips 54X series of multi-channel buffered serial interfaces
Platform: | Size: 3139584 | Author: 李春 | Hits:

[RFID] RFID_14443

Description: 基于TI TRF7960的RFID读卡器主机端源代码，支持14443A和14443B。-RFID 14443 application source code for the Texas Instruments TRF7960 RFID reader.
Platform: | Size: 355328 | Author: gxliu | Hits:

[VHDL-FPGA-Verilog] tlc5510

Description: TI公司的TLC5510的用VHDL写的控制器及其仿真-TI' s TLC5510 use the controller to write VHDL and its simulation
Platform: | Size: 1239040 | Author: yangzhibin | Hits:

[VHDL-FPGA-Verilog] c54x_verilog

Description: TI 的TMS320C54X的DSP的芯片软核verilog源代码，可以帮助初学者深入了解该系列DSP片内资源核结构，值得参考！-TMS320C54X of TI' s DSP chip soft-core verilog source code, can help beginners a better picture of the family of DSP-chip resources, nuclear structure, it is also useful!
Platform: | Size: 22528 | Author: Jackson | Hits:

[VHDL-FPGA-Verilog] AIC23forAudio

Description: FPGA控制AIC23实现音频信号处理。AIC23是TI公司的高性能立体声处理芯片。-FPGA realization of the control AIC23 audio signal processing. AIC23 is a stereo TI' s high-performance processing chip.
Platform: | Size: 1456128 | Author: | Hits:

[VHDL-FPGA-Verilog] ad_da_ctr

Description: 基于FPGA的ad和da转换Verilog代码，FPGA采用ep2c5芯片，做成异步fifo，ad芯片采用TI的ths1230,da芯片采用TI的TLV5619，仿真结果基本正确。-FPGA-based ad and da conversion Verilog code, FPGA using ep2c5 chip, made ??of asynchronous fifo, ad-chip using TI s ths1230, da chip uses TI s TLV5619, simulation results are basically correct.
Platform: | Size: 2299904 | Author: ych | Hits:

[VHDL-FPGA-Verilog] hsadc

Description: ADC ADS62P49 It is TI adc verilog source code for
Platform: | Size: 2127872 | Author: anil | Hits:

[VHDL-FPGA-Verilog] fpga_ads8364

Description: fpga控制ti的多通道高精度ad芯片ads8364的verilog源码-fpga multi-channel high-precision control ti ad-chip ads8364 the verilog source code
Platform: | Size: 1024 | Author: 求求 | Hits:

[VHDL-FPGA-Verilog] ADS8328

Description: 高速精密ADC，TI公司的ADS8328的FPGA控制程序，使用verilog语言-High-speed precision ADC, TI s ADS8328 control program the FPGA using verilog language
Platform: | Size: 1024 | Author: 惊堂木 | Hits:

[Communication] TI 的TMS320C54X的DSP的芯片软核verilog源代码c54x_verilog

Description: TI 的TMS320C54X的DSP的芯片软核verilog源代码c54x_verilog
Platform: | Size: 22987 | Author: iwqtthf | Hits:

[VHDL-FPGA-Verilog] ADC

Description: 使用TI公司的TLC549芯片实现模数转换，使用verilog语言进行编程，功能完整-Using TI' s TLC549 chip analog to digital conversion, using verilog programming language, full-featured
Platform: | Size: 10240 | Author: | Hits:

[Communication] C6474L_EVM_RTL

Description: TI C6474评估板的fpga源代码，初始化板子必备代码，Verilog HDL硬件语言编写。-TI C6474 evaluation board fpga source code, the code necessary to initialize the board, Verilog HDL hardware language.
Platform: | Size: 46080 | Author: 凤园 | Hits:

[VHDL-FPGA-Verilog] ads805

Description: 电设用到！用verilog编写的TI的ADS805的调试程序。测试平台是DE0 。-Electric facilities used! TI' s written in verilog ADS805 debugger. Test platform is DE0.
Platform: | Size: 1784832 | Author: 黄俊 | Hits:

[assembly language] tlv2553

Description: verilog tlv2553 TI公司的ad芯片 在modelsim上进行波形仿真-verilog tlv2553
Platform: | Size: 1024 | Author: sunlu | Hits:

[VHDL-FPGA-Verilog] AFE0064

Description: AFE0064模拟前端芯片代码，使用verilog语言实现。-TI AFE0064 analog-front-end code with the verilog language
Platform: | Size: 257024 | Author: wangk | Hits:

[Other] RSIC

Description: 包含控制部分和逻辑运算部分的精简CPU，适合verilog的初学者(Ti's a CPU which contain the part of chontrol and Arithmetic logic,it's approximate for people who contact veriolg with short time)
Platform: | Size: 5292032 | Author: emmm.. | Hits:

[VHDL-FPGA-Verilog] DeSerTSW1250_V2_1_src

Description: TI TSW1250 FPGA code
Platform: | Size: 8396800 | Author: roc_verilog | Hits:

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