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Description: FPGA/CPLD应用,uart通讯VHDL原码.-FPGA/CPLD applications, UART communications VHDL source.
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Size: 10240 |
Author: cyberworm |
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Description: 一个在FPGA芯片上实现UART功能的vhdl源代码,提供了UART的集成-an FPGA chip to achieve UART function vhdl source code, providing integrated UART
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Size: 10240 |
Author: 王利 |
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Description: 基于FPGA的串行通信UART控制器,采用VHDL语言编写,包含多个子模块。
在ISE或FPGA的其它开发环境下新建一个工程,然后将文档中的各个模块程序添加进去,即可运行仿真。源程序已经过本人的仿真验证。-FPGA-based UART serial communication controller, using VHDL language, includes a number of sub-module. ISE FPGA or in the other developing a new environment, then documentation of the various modules of procedures added to it, will be running simulation. I have been the source of the simulation.
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Size: 14336 |
Author: 李浩 |
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Description: 用FPGA实现任意波形发生器的源代码,另外还包括FPGA实现UART,从而与MCU实现串行通信。-Using FPGA to achieve arbitrary waveform generator of the source code, including the FPGA also realize UART, in order to realize serial communication with the MCU.
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Size: 2048 |
Author: zhuangxb |
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Description: UART参考设计带缓存用于Xinlix用于FPGA-UART reference design with cache for Xinlix for FPGA
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Size: 279552 |
Author: sd |
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Description: vhdl的异步串口代码,可以方便以致在不同的FPGA中-asynchronous serial VHDL code, can easily result in different FPGA in
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Size: 18432 |
Author: 李冰 |
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Description: 一个UART的FPGA core,附有详细的代码阅读笔记-A UART of the FPGA core, accompanied by a detailed code of reading notes
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Size: 614400 |
Author: 获得 |
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Description: 串口通讯协议,你您可以自己建个工程,再将需要的VHDL文本,添加到工程中,理解程序在仿真!-Serial communication protocol, you can build your project, and then need VHDL text, added to the project, understand the procedures in the simulation!
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Size: 10240 |
Author: 张亚伟 |
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Description: 无私奉献,VHDL 源码,用于实现FPGA上的UART(串口控制器),可以实现FPGA与单片机,PC机的串口通讯。-Selfless dedication, VHDL source code for the FPGA realization of the UART (serial port controller), you can realize FPGA and MCU, PC serial communication machine.
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Size: 6144 |
Author: 骑士 |
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Description: FPGA相关硬件仿真程序,编译环境QUARTER Ⅱ。-FPGA hardware simulation program, the compiler environment QUARTER Ⅱ.
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Size: 493568 |
Author: 黄国江 |
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Description: 用FPGA实现了RS232异步串行通信,所用语言是VHDL,另外本人还有Verilog的欢迎交流学习,根据RS232 异步串行通信来的帧格式,在FPGA发送模块中采用的每一帧格式为:1位开始位+8位数据位+1位奇校验位+1位停止位,波特率为2400。由设置的波特率可以算出分频系数,具体算法为分频系数X=CLK/(BOUND*2)。-Using FPGA to achieve the RS232 asynchronous serial communication, the language used is VHDL, In addition, I also welcome the exchange of learning Verilog, according to RS232 asynchronous serial communication to the frame format, in the FPGA module used to send each frame format : the beginning of a bit+ 8-bit data bit+ 1 bit odd parity bit+ 1 bit stop bit, baud rate for 2400. By setting the baud rate can be calculated at the frequency coefficient, the specific algorithm for the sub-frequency coefficient X = CLK/(BOUND* 2).
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Size: 1024 |
Author: saibei007 |
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Description: 用FPGA,VHDL实现的Uart核,quartusII完整工程,实用-Using FPGA, VHDL realize the UART core, quartusII complete projects, practical
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Size: 631808 |
Author: wanyou |
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Description: M_UART
介绍了通用异步收发器(UART)的原理,并以可编程逻辑器件FPGA为核心控制部件,基于超高速硬件描述语言VHDL在Xilinx公司的SpartanⅡ系列的2sc200PQ208-5芯片上编程完成UART的设计。经测试,该设计完全达到了设计要求。-M_UART introduce a Universal Asynchronous Receiver Transmitter (UART) Principle and FPGA programmable logic device as the core control unit, based on the ultra-high-speed hardware description language VHDL in Xilinx
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Size: 18432 |
Author: lc |
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Description: 基于FPGA的uart控制器,波特率可选,VHDL编程,Quartusii 6.0 平台,vhdl语言编程-FPGA-based UART controller, an optional baud rate, VHDL programming, Quartusii 6.0 platform, vhdl language programming
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Size: 5093376 |
Author: 吕常智 |
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Description: 在VHDL上编写了UART通信协议,对于FPGA开发有很大帮助-In VHDL on the preparation of a UART communication protocol, for FPGA development of great help
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Size: 143360 |
Author: 王忠 |
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Description: 使用FPGA的FIFO,状态机,乒乓操作等实现了异步UART。-The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.
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Size: 1106944 |
Author: xiao cao |
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Description: fpga里实现 uart 经典 vhdl语言写的 ise工程文件-fpga implementation in vhdl language classic uart of ise project file
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Size: 22528 |
Author: 孙俪 |
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Description: 基于现场可编程逻辑器件(FPGA)使用VHDL语言QuartusII实现UART通讯-Based on field programmable logic device (FPGA) using VHDL language QuartusII achieve UART communications
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Size: 14336 |
Author: 刘磊 |
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Description: FPGA中的UART模块,调试通过的哦!!希望对大家有所帮助,呵呵。。。我用的是quartus7.2版本编写的,当然也有些copy网上的-FPGA in the UART modules, debugging through the Oh! ! We want to help, Hehe. . . I use the quartus7.2 version of the written, of course, also some copy online
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Size: 1766400 |
Author: 单子奇 |
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Description: FPGA的UART程序,非常好的,讲解详细,我当初看了好多都看不懂,看了这个以后终于明白-FPGA' s UART program, very good, detailed explanation, I had read a lot have not read, finally realized after reading this
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Size: 276480 |
Author: xuxing |
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