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[WEB Code] UART(FPGA)

Description: 基于FPGA的串行通信UART控制器，采用VHDL语言编写，包含多个子模块。 在ISE或FPGA的其它开发环境下新建一个工程，然后将文档中的各个模块程序添加进去，即可运行仿真。源程序已经过本人的仿真验证。-FPGA-based UART serial communication controller, using VHDL language, includes a number of sub-module. ISE FPGA or in the other developing a new environment, then documentation of the various modules of procedures added to it, will be running simulation. I have been the source of the simulation.
Platform: | Size: 14758 | Author: 李浩 | Hits:

[Other resource] 一个简单的UART

Description: 采用VHDL编写的一个简单的UART-using VHDL prepared a simple UART
Platform: | Size: 3654 | Author: 陈旭 | Hits:

[VHDL-FPGA-Verilog] 一个简单的UART

Description: 采用VHDL编写的一个简单的UART-using VHDL prepared a simple UART
Platform: | Size: 3072 | Author: 陈旭 | Hits:

[VHDL-FPGA-Verilog] conv_code

Description: 用VHDL实现卷积码编码，该码为（2.1.3）型卷积码。-using VHDL Convolutional coding, the code (2.1.3)- Convolutional Codes.
Platform: | Size: 1024 | Author: 武汉 | Hits:

[VHDL-FPGA-Verilog] ISE_uart

Description: 自己在ISE下用VHDL写的UART，简单，易懂-in ISE using VHDL was the UART, simple, understandable
Platform: | Size: 936960 | Author: sk | Hits:

[Documents] UART(FPGA)

Description: 基于FPGA的串行通信UART控制器，采用VHDL语言编写，包含多个子模块。 在ISE或FPGA的其它开发环境下新建一个工程，然后将文档中的各个模块程序添加进去，即可运行仿真。源程序已经过本人的仿真验证。-FPGA-based UART serial communication controller, using VHDL language, includes a number of sub-module. ISE FPGA or in the other developing a new environment, then documentation of the various modules of procedures added to it, will be running simulation. I have been the source of the simulation.
Platform: | Size: 14336 | Author: 李浩 | Hits:

[VHDL-FPGA-Verilog] FPGA+DSS+UART

Description: 用FPGA实现任意波形发生器的源代码，另外还包括FPGA实现UART，从而与MCU实现串行通信。-Using FPGA to achieve arbitrary waveform generator of the source code, including the FPGA also realize UART, in order to realize serial communication with the MCU.
Platform: | Size: 2048 | Author: zhuangxb | Hits:

[VHDL-FPGA-Verilog] URATVHDLDocument

Description: 用VHDL描述uart后整理的文档，很全面，代码注释很详细-Described using VHDL UART finishing the document, very comprehensive and very detailed code Notes
Platform: | Size: 54272 | Author: ninghuiming | Hits:

[Com Port] uart

Description: 开源的串口通信程序，用vhdl 编写的，已通过测试，在DE2的开发板上能够运行。-Open source serial communication procedures, prepared by using VHDL, has been tested in the DE2 development board to run.
Platform: | Size: 2048 | Author: caijl88 | Hits:

[Com Port] uart

Description: this a Uart source code using Verilog.
Platform: | Size: 10240 | Author: Daniel Zhang | Hits:

[VHDL-FPGA-Verilog] UART

Description: 用FPGA实现了RS232异步串行通信，所用语言是VHDL，另外本人还有Verilog的欢迎交流学习，根据RS232 异步串行通信来的帧格式，在FPGA发送模块中采用的每一帧格式为：1位开始位+8位数据位+1位奇校验位+1位停止位，波特率为2400。由设置的波特率可以算出分频系数，具体算法为分频系数X=CLK/(BOUND*2)。-Using FPGA to achieve the RS232 asynchronous serial communication, the language used is VHDL, In addition, I also welcome the exchange of learning Verilog, according to RS232 asynchronous serial communication to the frame format, in the FPGA module used to send each frame format : the beginning of a bit+ 8-bit data bit+ 1 bit odd parity bit+ 1 bit stop bit, baud rate for 2400. By setting the baud rate can be calculated at the frequency coefficient, the specific algorithm for the sub-frequency coefficient X = CLK/(BOUND* 2).
Platform: | Size: 1024 | Author: saibei007 | Hits:

[VHDL-FPGA-Verilog] Uart

Description: 用ＦＰＧＡ，VHDL实现的Uart核，quartusII完整工程，实用-Using FPGA, VHDL realize the UART core, quartusII complete projects, practical
Platform: | Size: 631808 | Author: wanyou | Hits:

[VHDL-FPGA-Verilog] uart(Verilog)

Description: uart异步串口通信协议的源代码，用vhdl语言编写，并且有完整得测试文件-UART asynchronous serial communication protocol source code, using VHDL language, and may have a complete test file
Platform: | Size: 10240 | Author: 阿军 | Hits:

[VHDL-FPGA-Verilog] UART

Description: 基于FPGA的UART实现 用VHDL编程-The UART-based FPGA using VHDL Programming
Platform: | Size: 524288 | Author: hyj1954 | Hits:

[VHDL-FPGA-Verilog] UART

Description: UART通信协议的硬件描述语言代码，用与FPGA的总线接口开发-UART communication protocol of the hardware description language code, using the bus interface with the FPGA development
Platform: | Size: 22528 | Author: shigengxin | Hits:

[VHDL-FPGA-Verilog] UART

Description: UART是一种广泛应用于短距离、低速、低成本通信的串行传输接口.由于常用UART芯片比较复杂且移植性差,提出一种采用可编程器件FPGA实现UART的方法, 实现了对UART的模块化设计.首先简要介绍UART的基本特点,然后依据其系统组成设计顶层模块,再采用有限状态机设计接收器模块和发送器模块,所有功能的实现全部采用VHDL进行描述,并用Modelsim软件对所有模块仿真实现.最后将UART的核心功能集成到FPGA上,使整体设计紧凑,小巧,实现的UART功能稳定、可靠. -UART is a widely used short-range, low-speed, low-cost serial transmission interface communication. Because of the complexity of common UART chip and poor transplant, using a programmable FPGA devices to achieve UART way of the realization of the UART modular design. First of all, a brief introduction of the basic characteristics of UART, and then according to their top-level module system design, and then the design of finite state machine receiver module and transmitter module, the realization of all the features to describe the use of VHDL and Modelsim software used Simulation of all modules. Finally, the UART core functionality into the FPGA, so that the overall design of compact, compact, the UART function of the realization of stable and reliable.
Platform: | Size: 38912 | Author: 徐明宝 | Hits:

[VHDL-FPGA-Verilog] UART(FPGA)

Description: 基于现场可编程逻辑器件（FPGA）使用VHDL语言QuartusII实现UART通讯-Based on field programmable logic device (FPGA) using VHDL language QuartusII achieve UART communications
Platform: | Size: 14336 | Author: 刘磊 | Hits:

[VHDL-FPGA-Verilog] UARTipcore

Description: 这是一个关于UART的IP核，用VHDL写的。经过本人的鉴证，非常实用并且写的非常好。-This is one of the IP core on the UART, using VHDL written. After my verification, very practical and very well written.
Platform: | Size: 22528 | Author: 11 | Hits:

[Embeded-SCM Develop] UART

Description: A simple preoteus based design to display the characters typed int the keyboard into LCD using UART of 8051.Plz make sure that TTL to RS232 is inserted in between the microcontroller and virtual terminal which is not shown in the design.
Platform: | Size: 45056 | Author: sandeep | Hits:

[VHDL-FPGA-Verilog] uart

Description: uart - universal asynchronous receicer and transmitter source code using VHDL
Platform: | Size: 1930240 | Author: nagarjuna reddy | Hits:
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