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[Other Embeded program] ip

Description: usart的verilog代码.rar 包括很多的FPGA ip 源码，可以直接应用 uart_vhdl.zip sl811usb包含源程序.rar mc8051_design.zip mcpu_1[1].05.zip minicpu.zip mmc_lark_original.zip -USART the Verilog code. rar, including many of the FPGA ip source, can be applied directly uart_vhdl.zipsl811usb contains the source code. rarmc8051_design.zipmcpu_1 [1] .05. zipminicpu.zipmmc_lark_original.zip
Platform: | Size: 5391360 | Author: 钟阳 | Hits:

[VHDL-FPGA-Verilog] usart_verilog

Description: 通用串行异步收发器8251的Verilog HDL源代码.doc-Universal Serial Asynchronous Receiver Transmitter 8251 the Verilog HDL source code. Doc
Platform: | Size: 15360 | Author: 赵国柱 | Hits:

[Other] components

Description: USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
Platform: | Size: 1024 | Author: Somasekhar | Hits:

[VHDL-FPGA-Verilog] rd_wr_control

Description: USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
Platform: | Size: 1024 | Author: Somasekhar | Hits:

[VHDL-FPGA-Verilog] tx_buff

Description: USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
Platform: | Size: 1024 | Author: Somasekhar | Hits:

[VHDL-FPGA-Verilog] rec_buf

Description: USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
Platform: | Size: 2048 | Author: Somasekhar | Hits:

[VHDL-FPGA-Verilog] usart

Description: USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
Platform: | Size: 1024 | Author: Somasekhar | Hits:

[VHDL-FPGA-Verilog] usart

Description: Usart model in vhdl code
Platform: | Size: 6144 | Author: gnomix | Hits:

[Education soft system] UARTTransmitterModel

Description: usart modelling in vhdl for fpga users
Platform: | Size: 18432 | Author: ali | Hits:

[VHDL-FPGA-Verilog] usart

Description: USART universal Synchronous and Asynchronous Receiver and transmitter-USART universal Synchronous and Asynchronous Receiver and transmitter
Platform: | Size: 429056 | Author: hr | Hits:

[VHDL-FPGA-Verilog] fpga_uarst

Description: fpga USART通信，VHDL语言编写，通过测试。程序全面运用了状态机编程-The fpga the USARTs communications, VHDL language, pass the test. The entire process of the use of state machine programming
Platform: | Size: 289792 | Author: | Hits:

[Other] tx-vhdl-code

Description: for tx in usart protocol.
Platform: | Size: 192512 | Author: omid | Hits:

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