Search - VHDL DDC

[VHDL-FPGA-Verilog] CPRI

Description:
Platform: | Size: 933888 | Author: 郭坚 | Hits:

Description: 本文总结了CIC 滤波器理论要点，介绍了采用FPGA设计CIC 滤波器的基本方法，使滤波器的参数可以按实际需要任意更改，给出了仿真结，验证了设计的可靠性和可行性。采用该方法设计的CIC 滤波器已用于DDC芯片，也适合下一代高频雷达系统的要求。-This paper summarizes the main points of CIC filter theory, introduced the CIC filter design using FPGA basic ways in which filter parameters can be arbitrary according to the actual needs change, the simulation node to verify the reliability of the design and feasibility. Designed using the CIC filter has been used in DDC chips, also suitable for the next generation of high-frequency radar system requirements.
Platform: | Size: 700416 | Author: 会飞的鱼 | Hits:

[VHDL-FPGA-Verilog] DecimationFilterDesignforDDCandImplementingItwithF

Description: 本文介绍了在数字下变频(DDC) 中的抽取滤波器系统设计方法和具体实现方案。采用CIC 滤波器、HB 滤波器、FIR 滤波器三级级联的方式来降低采样率。通过实际验证,证明了设计的可行性-This article describes the digital down conversion (DDC) of the decimation filter system design methods and concrete realization of the program. Using CIC filter, HB filter, FIR filter cascade three-level approach to reduce the sampling rate. Through the actual authentication, to prove the feasibility of the design
Platform: | Size: 468992 | Author: 会飞的鱼 | Hits:

[VHDL-FPGA-Verilog] tdmddc_v71

Description: ddc的vhdl源代码，没有经过调试，只是作为分享，大家有什么意见和建议请回复邮件-ddc the VHDL source code, no debugging, just as share what everyone has opinions and suggestions, please reply to e-mail
Platform: | Size: 26624 | Author: zhangxi | Hits:

[VHDL-FPGA-Verilog] DUC

Description: 数字上变频DUC是与数字下变频ddc相对应的工作.目前实现方式主要有:专用芯片,通用DSP和FPGA实现三种.本程序即给出了XILINX公司的Digital Up Converter核心程序(IP CORE)以及响应的使用说明,对于从事雷达,无线通信的工程人员和研究者有很大用处.-DUC is a digital up-conversion and digital down conversion that corresponds to the work of ddc. Realize the current approach are: ASIC, DSP and FPGA generic realize three. This procedure is given that the company XILINX core Digital Up Converter program (IP CORE) and to respond to instructions, for radar, wireless communications, engineers and researchers have great usefulness.
Platform: | Size: 305152 | Author: 周严 | Hits:

[Software Engineering] AD6634DDC

Description: DDC design based on AD6634,useful-DDC design based on AD6634, useful
Platform: | Size: 39936 | Author: 岳翔 | Hits:

[VHDL-FPGA-Verilog] project_UHF_ddc

Description: vhdl语言写的数字下变频的实现，整个工程文件，xlinx ise用的-VHDL language written in the realization of digital down conversion, the whole project file, xlinx ise used
Platform: | Size: 1868800 | Author: 杨斌 | Hits:

[matlab] ddc

Description: 数字下变频器的matlab实现，一定的设计指标，可以用来知道vhdl程序设计-Digital Down Converter for matlab realized, certain design specifications that can be used to know VHDL Programming
Platform: | Size: 2048 | Author: 杨斌 | Hits:

[matlab] ddc_simulate_short

Description: matlab编制的短脉冲ddc程序,希望对大家有帮助！-matlab prepared short pulse ddc procedures, we would like to help!
Platform: | Size: 2048 | Author: feng zhenwei | Hits:

[VHDL-FPGA-Verilog] DDC

Description: verilog语言实现的数字下变频设计。在ALTERA的QUARTUS ii下实现。实用，好用。-Verilog language implementation of the digital down-conversion design. ALTERA at the implementation of QUARTUS ii. Practical, easy to use.
Platform: | Size: 44032 | Author: 咚咚 | Hits:

[Multimedia program] DDC_FilterChain_HDL

Description: simulink demo of ddc
Platform: | Size: 173056 | Author: bnpvas | Hits:

[Other] DDC

Description: Digital Down Covertor Documents
Platform: | Size: 1491968 | Author: Kiran | Hits:

[VHDL-FPGA-Verilog] RealizationofdigitaldownconversionbyFPGA

Description: 介绍在FPGA 器件上如何实现单通道数字下变频（DDC）系统。利用编写VHDL 程序和调用部分IP 核相结合的方法研究了数字下变频的FPGA 实现方法,并且完成了其主要模块的仿真和调试,并进行初步系统级验证。-Introduced in the FPGA device on how to achieve the single-channel digital down conversion (DDC) system. VHDL procedures and the use of the preparation of some call a combination of IP core method of the FPGA digital down conversion method, and completed its main modules of simulation and debugging, and initial system-level verification.
Platform: | Size: 162816 | Author: 于银 | Hits:

[VHDL-FPGA-Verilog] DDC

Description: 直接数字频率合成dds源码，cos三角函数生成代码，及测试代码，用于ddc前端测试的testbench。-direct digital frequency sysnthesis
Platform: | Size: 25600 | Author: wq | Hits:

[VHDL-FPGA-Verilog] FPGA-DDC

Description: 基于FPGA的直接数字频率合成器的设计和实现。-FPGA-Based Direct Digital Frequency Synthesizer Design and Implementation.
Platform: | Size: 100352 | Author: 孙新荣 | Hits:

[VHDL-FPGA-Verilog] cic

Description: 在MATLAB2007A/SIMULINK环境下用DSP BUILDER8.0实现了五级CIC，解决了溢出问题。生成了可用的VHDL文件。- DSP BUILDER8.0 A 5 stages CIC filer is realized in MATLAB2007A/SIMULINK by using DSP Builder 8.0.The overflow problem is resulved.Useful VHDL files are generated at last.
Platform: | Size: 1543168 | Author: hcq | Hits:

[Other] FPGA-DDC

Description: 基于DSPbuilder的数字变频文章，有simulink方框图-Based on the number of frequency DSPbuilder articles, there are simulink block diagram
Platform: | Size: 5936128 | Author: 小聪 | Hits:

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[VHDL-FPGA-Verilog] CPRI

[VHDL-FPGA-Verilog] CICFPGA

[VHDL-FPGA-Verilog] DecimationFilterDesignforDDCandImplementingItwithF

[VHDL-FPGA-Verilog] tdmddc_v71

[VHDL-FPGA-Verilog] DUC

[Software Engineering] AD6634DDC

[VHDL-FPGA-Verilog] project_UHF_ddc

[matlab] ddc

[matlab] ddc_simulate_short

[VHDL-FPGA-Verilog] DDC

[Multimedia program] DDC_FilterChain_HDL

[Other] DDC

[VHDL-FPGA-Verilog] RealizationofdigitaldownconversionbyFPGA

[VHDL-FPGA-Verilog] DDC

[VHDL-FPGA-Verilog] FPGA-DDC

[VHDL-FPGA-Verilog] cic

[Other] FPGA-DDC

[Software Engineering] DDC

[Software Engineering] ddc

[VHDL-FPGA-Verilog] ddc

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