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[Other resource] POC

Description: 基于VHDL的POC接口控制器,用于CPU与打印机间的数据控制-based on the POC VHDL interface controller, CPU and printer for the data control
Platform: | Size: 84605 | Author: marscr | Hits:

[Other resource] poc

Description: 用VHDL编写的简单POC（并行输出控制）程序，可以实现CPU以及外设之间的接口功能
Platform: | Size: 844057 | Author: 匡木 | Hits:

[MiddleWare] POC

Description: 基于VHDL的POC接口控制器,用于CPU与打印机间的数据控制-based on the POC VHDL interface controller, CPU and printer for the data control
Platform: | Size: 83968 | Author: marscr | Hits:

Description: 用VHDL编写的简单POC（并行输出控制）程序，可以实现CPU以及外设之间的接口功能-Use VHDL to prepare a simple POC (parallel output control) procedures, can be achieved between the CPU and peripheral interface functions
Platform: | Size: 843776 | Author: 匡木 | Hits:

[VHDL-FPGA-Verilog] ppoc

Description: 简单的POC实现与打印机，CPU的连接可以中断或查询方式。-POC realize a simple printer, CPU connections can be interrupted or query.
Platform: | Size: 169984 | Author: 刘超 | Hits:

[Internet-Network] POC

Description: a parallel output controller(handshake protocol)-a parallel output controller (handshake protocol)
Platform: | Size: 4096 | Author: humengwei | Hits:

[VHDL-FPGA-Verilog] poc1

Description: poc的VHDL详细设计实现握手信号的交互 -poc of VHDL handshake signal to achieve the detailed design of interactive
Platform: | Size: 116736 | Author: 郭红 | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: 基于VHDL的POC编写与实现实现三次握手-VHDL-based preparation and implementation of the POC to achieve three-way handshake
Platform: | Size: 300032 | Author: 郭红 | Hits:

[VHDL-FPGA-Verilog] poc

Description: 用VHDL语言讲述输出控制器（POC）的设计，这是大学课程的设计-VHDL language used on the output controller (POC) design, This is the design of university courses
Platform: | Size: 33792 | Author: 黄小芳 | Hits:

[VHDL-FPGA-Verilog] POC

Description: 东南大学学生数字系统设计实验：用VHDL语言编写Printer与CPU互连的接口程序-Southeast University students in the experimental digital system design: VHDL language with Printer and CPU interface interconnection procedures
Platform: | Size: 1024 | Author: 田华梅 | Hits:

[VHDL-FPGA-Verilog] CPU

Description: 实现简单CPU功能的源码，可以实现加减乘除和移位功能，VHDL代码，程序运行在MAX PULS和Quartua上。-The purpose of this project is to design and simulate a parallel output controller (POC) which acts an interface between system bus and printer. The Altera’s Maxplus Ⅱ EDA tool is recommended and provided for simulation.
Platform: | Size: 4490240 | Author: 灿烂六月 | Hits:

[assembly language] cpu-poc

Description: 满足并行输出输入的功能，同时与打印机相连，程序中又添加了微处理器的程序。-To meet the parallel input-output function, while with the printer connected to the program has added a microprocessor program.
Platform: | Size: 1736704 | Author: 商客 | Hits:

[assembly language] course-design-cpu-poc

[assembly language] POC

Description: CUP 与打印机的接口POC，主要实现了握手信号的交流和数据的传输。程序运用了语言VHDL-CUP and the printer interface POC, mainly realized exchange handshake signals and data transmission. Program used the VHDL language
Platform: | Size: 118784 | Author: TY | Hits:

[VHDL-FPGA-Verilog] poc

Description: 连接CPU与外部器件printer的接口元件，用VHDL语言编写，可进行仿真-CPU and external devices connected printer interface components, with the VHDL language, can be simulated
Platform: | Size: 539648 | Author: Sophie | Hits:

[VHDL-FPGA-Verilog] POC

Description: 用VHDL语言设计的poc （并行输出控制器）用法：中断模式和查询模式-Using VHDL language design poc (parallel output controller) Usage: interrupt mode and query mode
Platform: | Size: 409600 | Author: 束佳云 | Hits:

[VHDL-FPGA-Verilog] POC-Project

Description: 系统总线与打印机之间的借口：并行输出控制器POC的设计。涉及POC与CPU，POC与printer之间的握手操作。-Between the system bus and an excuse for the printer: parallel output controller POC design. Involved in POC and CPU, POC and the printer handshake between the operations.
Platform: | Size: 641024 | Author: ilmf | Hits:

[VHDL-FPGA-Verilog] parallel-output-controller-(POC)

Description: 并行输出控制器，实现CPU与打印机之间的通信，程序基于VHDL语言，内附完整实验报告与仿真图像-The purpose of this project is to design and simulate a parallel output controller (POC)which acts an interface between system bus and printer. The Altera’s Quartus II EDA tool is recommended and provided for simulation.
Platform: | Size: 74752 | Author: 陈鹏 | Hits:

[VHDL-FPGA-Verilog] My_POC

Description: Simulating the functions of POC.(Simulating the functions of POC. In VHDL, with ISE.)
Platform: | Size: 568320 | Author: KevinZZ | Hits:

[VHDL-FPGA-Verilog] POC

Description: 实现了计算机系统中作为I/O模块的POC。(It simulates the POC module which works as an I/O module in a computer system.)
Platform: | Size: 3072 | Author: 青空空 | Hits:

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[Other resource] POC

[Other resource] poc

[MiddleWare] POC

[Software Engineering] poc

[VHDL-FPGA-Verilog] ppoc

[Internet-Network] POC

[VHDL-FPGA-Verilog] poc1

[VHDL-FPGA-Verilog] vhdl

[VHDL-FPGA-Verilog] poc

[VHDL-FPGA-Verilog] POC

[VHDL-FPGA-Verilog] CPU

[assembly language] cpu-poc

[assembly language] course-design-cpu-poc

[assembly language] POC

[VHDL-FPGA-Verilog] poc

[VHDL-FPGA-Verilog] POC

[VHDL-FPGA-Verilog] POC-Project

[VHDL-FPGA-Verilog] parallel-output-controller-(POC)

[VHDL-FPGA-Verilog] My_POC

[VHDL-FPGA-Verilog] POC

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