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Description: Altera MAX II 开发板原理图-Altera's MAX II development board schematics
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Size: 241630 |
Author: 吴军 |
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Description: altera关于hardcopy的资料PPT格式的
第一部分
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Size: 375468 |
Author: hubin |
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Description:
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Size: 233094 |
Author: sqazsq |
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Description: 这个是专门用在ALtera第二代PLD MAXII上的16位微处理器IP核,文档齐全-this is the ALtera devoted second-generation PLD MAXII on the 16-bit microprocessor IP core, complete documentation
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Size: 240640 |
Author: 李无志 |
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Description: 本教程定位于FPGA/CPLD的快速入门。以ALTERA公司的芯片和相应的开发软件为目标载体进行阐述,本教程阐述了ALTERA主要系列芯片PLD芯片的结构和特点以及相应的开发软件MAX和Plusa和Quartus的使用-position in the handbook FPGA/CPLD Quick Start. With Altera's chips and the corresponding development of software for the target vector elaborate, the tutorials explain the main chips Altera PLD chips on the structure and characteristics of the corresponding software development MA Plusa and X and the use Quartus
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Size: 4328448 |
Author: 小易 |
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Description: Altera MAX II 开发板原理图-Altera's MAX II development board schematics
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Size: 241664 |
Author: 周宇 |
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Description: 智能机器小车主要完成寻迹功能,由机械结构和控制单元两个部分组成。机械结构是一个由底盘、前后辅助轮、控制板支架、传感器支架、左右驱动轮、步进电机等组成。控制单元部分主要由主要包含传感器及其调理电路、步进电机及驱动电路、控制器三个部分。本设计的核心为控制器部分,采用Altera MAX7000S系列的EPM7064LC84-15作主控芯片。CPLD芯片的设计主要在MAX+plusⅡ10.0环境下利用VHDL语言编程实现。驱动步进电机电路主要利用ULN2803作为驱动芯片。 -intelligent machines trolley track of the major functions by mechanical structure and control modules of two components. Mechanical structure is a chassis, after supporting wheels, the control panel stent, sensors stent, driving wheel around, Stepper motors, and other components. Some of the main control unit from the mainly contains sensors and conditioning circuits, and stepper motor drive circuit, the controller of three parts. The design for the core controller, Altera MAX7000S the EPM7064LC84-15 for the control chip. CPLD chip design mainly in MAX II plus 10.0 environment using VHDL programming. Stepper motor driver circuit using mainly driven ULN2803 chip.
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Size: 1024 |
Author: lili |
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Description: Altera公司的max+plus2软件的详细使用演示,从入门到精通-Altera's max plus2 use of the detailed software demonstrations, from entry level to proficiency
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Size: 262144 |
Author: 苏航 |
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Description: Altera原版MAXII开发板原理图(EPM1270F256C5)-Altera development board MAXII original schematic (EPM1270F256C5)
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Size: 240640 |
Author: 汪学明 |
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Description: altera关于hardcopy的资料PPT格式的
第一部分-altera information on the hardcopy of the first part of PPT format
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Size: 374784 |
Author: hubin |
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Description: Altera epm240 的ufm调用。-Altera epm240 the UFM call.
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Size: 226304 |
Author: Potossas |
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Description: 这是一个在MAX II CPLD利用FT245BM 模块实现USB传输的读写程序,用的是Verilog HDL语言-This is a MAX II CPLD module using USB transmit FT245BM reading and writing process, using Verilog HDL language
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Size: 975872 |
Author: 杨林成 |
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Description: MAX+PLUSII软件是一个功能强大,容易使用的软件包,它可以以图
形方式、文字输入方式(AHDL、VHDL和VERILOG)和波形方式输入设计文
件,可以编译并形成各种能够下装到EPROM和各种ALTERA器件的文件,还可
以进行仿真以检验设计的准确性,下面举例说明该软件的使用-MAX+ PLUSII software is a powerful, easy-to-use software package, which can graphically, text input methods (AHDL, VHDL and VERILOG) and waveform enter design documents can be compiled and form can be downloaded to a variety of EPROM and ALTERA documents a variety of devices can also be used for simulation to test the accuracy of the design, the following examples to illustrate the use of the software
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Size: 124928 |
Author: 徐靖 |
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Description: 基于Altera的FPGA开发的基于FPGA的AD转换功能,完全通过验证。-Altera s FPGA-based development of FPGA-based AD conversion function, fully validated.
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Size: 58368 |
Author: sq |
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Description: 完整的ALTERA MAXⅡEPM570试验板资料,包括原理图和PCB图,BOM表,可以直接做板。-Complete ALTERA MAX Ⅱ EPM570 test boards, including schematic and PCB diagram, BOM tables, plates can be directly done.
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Size: 433152 |
Author: blur |
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Description: ALTERA公司的MAXⅡ系列CPLD的内部flash使用教程,内容很详细,图文并茂,英文版。-ALTERA s MAX Ⅱ series CPLD to use the internal flash tutorial is very detailed, with illustrations in English.
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Size: 848896 |
Author: blur |
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Description: 一个ALTERA公司EPM1270 cpld的实验板原理图,其中有PCI接口电路,PDF格式-A ALTERA Corporation EPM1270 cpld schematic diagram of the experimental board, including PCI interface circuit, PDF format
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Size: 240640 |
Author: blur |
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Description: Verilog是广泛应用的硬件描述语言,可以用在硬件设计流程的建模、综合和模拟等多个阶段。随着硬件设计规模的不断扩大,应用硬件描述语言进行描述的CPLD结构,成为设计专用集成电路和其他集成电路的主流。通过应用Verilog HDL对多功能电子钟的设计,达到对Verilog HDL的理解,同时对CPLD器件进行简要了解。
本文的研究内容包括: 对Altera公司Flex 10K系列的EPF10K 10简要介绍,Altera公司软件Max+plusⅡ简要介绍和应用Verilog HDL对多功能电子钟进行设计。
-Verilog is the most widely used hardware description language.It can be used to the modeling, synthesis, and simulation stages of the hardware system design flow. With the scale of hardware design continually enlarging, describing the CPLD with HDL become the mainstream of designing ASIC and other IC.To comprehend Verilog HDL and get some knowledge of CPLD device, we design a block with several functions with Verilog HDL.
This thesis is about to discuss the above there aspects: Introduce the EPF10K 10 of Flex 10K series producted by Altera Corporation simply. the software Max+plusⅡ,Design the block with several functions with Verilog HDL.
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Size: 482304 |
Author: li |
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Description: Altera 公司生产的CPLD系列中的低端高性能产品MAXII用户手册,这个也能从Altera官方网站上下载。-Altera' s CPLD series production of low-end high-performance products MAXII user' s manual, this is also downloaded from the Altera website.
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Size: 2846720 |
Author: carris |
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Description: 基于altera MAX II,实现与上位机间的rs232串口通信。(Based on Altera MAX II, the RS232 serial communication between the host computer and the host computer is realized)
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Size: 130048 |
Author: yellowdog |
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