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[Communication] BCH（15,7,2)

Description: bch（15,7,2）decode and encode in verilog hdl N=15，K=7，T=2时的BCH码编码：
Platform: | Size: 7703 | Author: Chitorr | Hits:

[Data structs] BCH

Description: 一个解码的类，常用在条形码的解码中，是老外写的比较实用-a decoder category, commonly used in bar code decoding, the foreigner is more practical writing
Platform: | Size: 3072 | Author: 刘怀国 | Hits:

[DSP program] bch_euc

Description: bch 编码、解码程序，可以对任意长度的信息添加纠错码。-BCH encoding, decoding procedures can be arbitrary length of the right information to add error-correcting codes.
Platform: | Size: 4096 | Author: Guch Wu | Hits:

[VHDL-FPGA-Verilog] crc3321

Description: CRC循环校验码的VERILOG源文件，在MODELSIM下的一个工程。-Cyclic Check Code VERILOG source, the MODELSIM of a project.
Platform: | Size: 26624 | Author: 刘仪 | Hits:

[source in ebook] BCHandRS

Description: 一些纠错编码的c程序实现，包括bch码，rs码，均已调试通过-some of the c-correction coding program, including BCH code, rs codes have been adopted Debugging
Platform: | Size: 842752 | Author: 张华 | Hits:

[VHDL-FPGA-Verilog] bch_encoder_decoder

Description: bch encoder+decoder 源代码，Flash控制器，通讯都需要用到哦-bch encoder+ decoder source code, Flash controller, communications are needed Oh
Platform: | Size: 136192 | Author: linchan | Hits:

[Communication-Mobile] serialparallel

Description: BCH编码器并行8路实现，速率达到300M以上-BCH encoder realize 8-channel parallel, the rate reached more than 300M
Platform: | Size: 2048 | Author: 张凯斌 | Hits:

[Communication-Mobile] decoder

Description: 用verilog编写的bch译码器，包括测试文件，随机加载了比特流，进行了测试。-Prepared using Verilog BCH decoder, including test papers, random load the bit stream to carry out the test.
Platform: | Size: 357376 | Author: 牛顿 | Hits:

[Windows Develop] BCH_Decoder72

Description: BCH代码，采用VHDL实现，能够实现纠错，带有波形。-BCH code, the use of VHDL implementation, be able to achieve error correction with waveform.
Platform: | Size: 206848 | Author: daisy | Hits:

[Communication] BCHbch

Description: BCH编码 实现BCH信道编码功能 实现BCH信道编码功能-BCH code BCH code BCH code BCH code BCH code BCH code BCH code
Platform: | Size: 933888 | Author: p2pover | Hits:

[Streaming Mpeg4] rs_encode

Description: 这是用verilog编写的RS（204，188）代码，适用于数字电视的BCH编码过程。-This is the verilog prepared using RS (204,188) code, the application of digital television in the course of the BCH code.
Platform: | Size: 2048 | Author: 蕊宫獍雪 | Hits:

[Documents] BCH

Description: 有效的并行编码器对于长BCH编码的 大家放心 真的号死后和很好评的-Area efficient parallel decoder architecture for long BCH codes
Platform: | Size: 158720 | Author: 王喜爱 | Hits:

[Software Engineering] BCH15_11

Description: example of codec BCH(15,11)
Platform: | Size: 12288 | Author: hidon | Hits:

[VHDL-FPGA-Verilog] viterbi_for_bch

Description: Viterbi based trellis decoder for (7,4) - binary BCH code-Viterbi based trellis decoder for (7,4)- binary BCH code
Platform: | Size: 1024 | Author: shahifaqeer | Hits:

[VHDL-FPGA-Verilog] bch

Description: Experimental report VHDL VHDL verilog rs flip-flop experiment experimental report VHDL VHDL verilog rs flip-flop experiment
Platform: | Size: 15360 | Author: santhu | Hits:

[VHDL-FPGA-Verilog] Verilog_for_BCH

Description: 使用verilog语言实现BCH编码，用于通信信道编码-Using verilog language implementation BCH coding, channel coding for communication
Platform: | Size: 9465856 | Author: 咕嘟大树 | Hits:

[VHDL-FPGA-Verilog] BCHdecode

Description: BCH(63,56) decode,verilog
Platform: | Size: 8192 | Author: liudm0 | Hits:

[VHDL-FPGA-Verilog] bch_encode

Description: this bch encoder verilog code-this is bch encoder verilog code
Platform: | Size: 2048 | Author: rakhi | Hits:

[matlab] BCH[31-16]-with-BPSK-MFSK

Description: comperation of performance of BCH [31 16] code with BPSK and MFSK
Platform: | Size: 12288 | Author: kantaria | Hits:

[VHDL-FPGA-Verilog] bch_verilog

Description: bch(255,239)编码算法的verilog实现，综合仿真通过，与matlab仿真的结果一致-bch(255,239)，using verilog
Platform: | Size: 3875840 | Author: shao | Hits:
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