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[VHDL-FPGA-Verilog] 8位大小比较器 DL : 0: 8位大小比较器的VHDL源代码，Magnitude Comparator VHDL description of a 4-bit magnitude comparator with expansion inputs-eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion
Update : 2025-02-17 Size : 1kb Publisher : 蔡孟颖
[VHDL-FPGA-Verilog] fifo_01 DL : 0: 8位相等比较器，比较8位数是否相等 -- 8-bit Identity Comparator -- uses 1993 std VHDL -- download from www.pld.com.cn & www.fpga.com.cn-eight other phase comparators, Comparing the same whether the median 8-- 8-bit Identity Comparator-- uses 1993 std VHDL-- download from www.pld.com.cn
Update : 2025-02-17 Size : 1kb Publisher : 罗兰
[VHDL-FPGA-Verilog] COMP DL : 0: 经过精心设计的比较器的代码，并在FPGA硬件平台实现和验证过的-Meticulously designed comparator code, and FPGA hardware platform and tested
Update : 2025-02-17 Size : 1kb Publisher : hewg
[SCM] comparator-- DL : 0: 基于比较器的快速扑获与实现，在很多控制场合有用-very immportant code , catch by comparator s
Update : 2025-02-17 Size : 91kb Publisher : 阿强
[VHDL-FPGA-Verilog] 4bitcomp DL : 0: I try 4-bit comparator here in VHDL
Update : 2025-02-17 Size : 42kb Publisher : Bayu
[VHDL-FPGA-Verilog] VHDL DL : 0: 8位相等比较器含源代码，用VHDL语言编写，具体很高的实用性，供读者参考-8, phase comparator, such as with the source code, using VHDL language, the specific relevance of a high for the reader is referred to
Update : 2025-02-17 Size : 1kb Publisher : lijinling
[ActiveX/DCOM/ATL] comparator DL : 0: 一个verilog源代码，作用是比较器的实验程序。-A verilog source code, the role of the experimental procedures comparator.
Update : 2025-02-17 Size : 66kb Publisher : PUDN_CHEN
[SCM] comparator DL : 0: 本程序使用C8051F020单片机中的比较器，对比较器的使用进行相应的操作。-The C8051F020 MCU to use the comparator, the use of the comparator to operate accordingly.
Update : 2025-02-17 Size : 9kb Publisher : xialijia
[ActiveX/DCOM/ATL] comparison DL : 0: 4位二进制比较器，比较两个输入的二进制数-4-bit binary comparator, compare two binary input
Update : 2025-02-17 Size : 161kb Publisher : 张辉
[VHDL-FPGA-Verilog] comparator DL : 0: Comparator for Quartus
Update : 2025-02-17 Size : 86kb Publisher : Blazer
[SCM] AVR_ATMEGA8_Analog_Comparator DL : 0: AVR單片機ATMEG8, ATMEG16A Use the Analog Comparator 通過循環查訊方式　或中斷方式　輸出比較器的結果對此功能有詳細的英文資料說明，不看不行　 • Detect a positive edge on the comparator output by polling the ACO-bit in the Analog Comparator Control and Status Register – ACSR. • Detect a positive edge on the comparator output by polling the Analog Comparator Interrupt Flag – ACI in ACSR. • Initialize interrupt on comparator output toggle. An interrupt routine which increments a 16-bit counter each time it is executed is given as an example. -AVR microcontroller ATMEG8, ATMEG16A Use the Analog Comparator way through the cycle of inquiry, or interrupt output compare function of the results of this detailed information in English, do not look impossible • Detect a positive edge on the comparator output by polling the ACO-bit in the Analog Comparator Control and Status Register- ACSR. • Detect a positive edge on the comparator output by polling the Analog Comparator Interrupt Flag- ACI in ACSR. • Initialize interrupt on comparator output toggle. An interrupt routine which increments a 16-bit counter each time it is executed is given as an example.
Update : 2025-02-17 Size : 2kb Publisher : 陆生
[Other Embeded program] pipeline_ADC_PLL DL : 0: 该文档提出了一种应用于开关电容流水线模数转换器的CMoS预运放一锁存比较器．该比较器采用UMC混合／射频0．18肛m 1P6M P衬底双阱CMOS工艺设计，工作电压为 1．8 V．该比较器的灵敏度为0．215 mV，最大失调电压为12 mV，差分输入动态范围为1．8 V，分辨率为8位，在40 M的工作频率下，功耗仅为24．4 ttW．基于0．18 gm工艺的仿真结果验证了比较器设计的有效性．-A CMOS preamplifier-latch comparator used in switched··capacitor pipeline analog··to-digital con·- verter WBS presented．The comparator WaS d髑igned under UMC Mixed．Mode／RF 0．18 btm 1P6M P．Sub Twin— Well CMOS process and worked with 1．8V power supply．The sensitivity of the comparator was 0．215 mV， the largest offset voltage was 12 mV，the differentiaI input range Was 1．8 V，the resolution was 8 bit and the power dissipation Was only 24．4 gW at 40 MHz．HSPICE simulations of the comparator implemented in a 0．18 um technology demonstrate its effectiveness．
Update : 2025-02-17 Size : 353kb Publisher : 赵恒
[VHDL-FPGA-Verilog] comp DL : 0: 数值比较器，Verilog实现，带具体实验说明文档。-Numerical comparator, Verilog realization of experiments with specific documentation.
Update : 2025-02-17 Size : 738kb Publisher : mypudn0001
[Embeded-SCM Develop] Comparator DL : 0: 这是msp430单片机比较器的基础程序，请大家下载，对你们的学习很有帮助。-This is the basis of the comparator msp430 microcontroller program, please download, on your very helpful.
Update : 2025-02-17 Size : 16kb Publisher : 徐瑞
[SCM] Comparator DL : 0: 430单片机的比较器的使用，比较经典，可供学习之用-SCM comparator 430 the use of more classic, available for study purposes
Update : 2025-02-17 Size : 16kb Publisher : wensun
[VHDL-FPGA-Verilog] comparator DL : 0: it contain source code for comparator module.
Update : 2025-02-17 Size : 1kb Publisher : sunny
[VHDL-FPGA-Verilog] comparator DL : 0: 8位二进制的数值比较器，这是用verilog hdl语言中的行为建模写的-8-bit binary value of the comparator, which is used in the verilog hdl behavioral modeling language to write
Update : 2025-02-17 Size : 144kb Publisher : 黄启
[VHDL-FPGA-Verilog] Comparator DL : 0: VHDL Bit Comparator
Update : 2025-02-17 Size : 527kb Publisher : sidpokhrel
[Other] DeltaSigma Converter with Analog Comparator DL : 0: Delta-Sigma converter with comparator and RRC circuit
Update : 2025-02-17 Size : 90kb Publisher : colorline
[VHDL-FPGA-Verilog] comparator DL : 0: a vhdl code for comparator
Update : 2025-02-17 Size : 255kb Publisher : maleki

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