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[Other resource] msc1210test1

Description: MSC1210的ADC采集以及RS232通讯读写CPLD的例子程序，已经调试通过。-MSC1210 ADC collection and RS232 communication literacy CPLD examples procedures, Debugging has passed.
Platform: | Size: 67256 | Author: 王栋梁 | Hits:

[Other resource] ATmega128

Description: ATmega128实验板。RS232,SRAM,CPLD调试通过，uCosII可以运行，ethernet部分没有完成，usb完成了一部分。 有参考价值。
Platform: | Size: 9984210 | Author: zdy | Hits:

[Embeded-SCM Develop] 232-fddi

Description: RS232-光纤的CPLD调制解调源程序，已测试通过
Platform: | Size: 817393 | Author: 俞国良 | Hits:

[Communication] FPGA-UART

Description: 用FPGA器件实现UART核心功能的一种方法 串行外设都会用到RS232-C异步串行接口，传统上采用专用的集成电路即UART实现，如TI、EXAR、EPIC的550、452等系列，但是我们一般不需要使用完整的UART的功能，而且对于多串口的设备或需要加密通讯的场合使用UART也不是最合适的。如果设计上用到了FPGA/CPLD器件，那么就可以将所需要的UART功能集成到FPGA内部，本人最近在用XILINX的XCS30做一个设计的时候，就使用VHDL将UADT的核心功能集成了，从而使整个设计更加紧凑，更小巧、稳定、可靠
Platform: | Size: 27456 | Author: 开心 | Hits:

[Other resource] rs232

Description: dp_xiliux 的 CPLD Verilog设计实验,串口演示.代码测试通过.
Platform: | Size: 122378 | Author: pp | Hits:

[Embeded-SCM Develop] ATmega128

Description: ATmega128实验板 简要介绍： 主要芯片： CPU:ATmega128L SRAM:SR61L256BS-8 CPLD:XILINX XC95144XL SFLASH:AT45DB081B ETHERNET:CS8900A USB:PDIUSBD12 LCD:122x32 LMC62_095_M POWER:LM2596S-3.3 RS232:MAX3232 软件：RS232,SRAM,CPLD调试通过，uCosII可以运行，ethernet部分没有完成，usb完成了一部分。 开发环境： WINAVR,ISE6,AVR Studio
Platform: | Size: 9936705 | Author: yhui | Hits:

[VHDL-FPGA-Verilog] 结合XILINXCPLD RS232通信(verilog)

Description: 结合XILINXCPLD所做的模拟RS232通信verilog源程序-XILINXCPLD combine the simulation RS232 communication Verilog source
Platform: | Size: 121856 | Author: 于飞 | Hits:

[Embeded-SCM Develop] rs232lan

Description: CPLD 9536 程序 我自己用的代码. VHDL语言-CPLD 9,536 procedures for my own use code. VHDL
Platform: | Size: 621568 | Author: 罗明 | Hits:

[SCM] ATmega128

Description: ATmega128实验板。RS232,SRAM,CPLD调试通过，uCosII可以运行，ethernet部分没有完成，usb完成了一部分。 有参考价值。-ATmega128 board. RS232, SRAM, CPLD through debugging, uCosII can run, ethernet part not completed, usb part completed. A valuable reference.
Platform: | Size: 9984000 | Author: zdy | Hits:

[Embeded-SCM Develop] 232-fddi

Description: RS232-光纤的CPLD调制解调源程序，已测试通过-RS232-fiber modem CPLD source, have been tested
Platform: | Size: 817152 | Author: 俞国良 | Hits:

[VHDL-FPGA-Verilog] rs232

Description: dp_xiliux 的 CPLD Verilog设计实验,串口演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, serial presentation. code test.
Platform: | Size: 121856 | Author: pp | Hits:

[Embeded-SCM Develop] ATmega128

Description: ATmega128实验板 简要介绍： 主要芯片： CPU:ATmega128L SRAM:SR61L256BS-8 CPLD:XILINX XC95144XL SFLASH:AT45DB081B ETHERNET:CS8900A USB:PDIUSBD12 LCD:122x32 LMC62_095_M POWER:LM2596S-3.3 RS232:MAX3232 软件：RS232,SRAM,CPLD调试通过，uCosII可以运行，ethernet部分没有完成，usb完成了一部分。 开发环境： WINAVR,ISE6,AVR Studio-ATmega128 board briefly introduce the experiment: the main chips: CPU: ATmega128L SRAM: SR61L256BS-8 CPLD: XILINX XC95144XL SFLASH: AT45DB081B ETHERNET: CS8900A USB: PDIUSBD12 LCD: 122x32 LMC62_095_M POWER: LM2596S-3.3 RS232: MAX3232 software: RS232, SRAM, CPLD Debug through, uCosII can run, ethernet part not completed, usb part completed. Development Environment: WINAVR, ISE6, AVR Studio
Platform: | Size: 9936896 | Author: yhui | Hits:

[VHDL-FPGA-Verilog] EPM240Prj

Description: 这是一个verilog HDL 语言的例子，在CPLD器件EPM240上实现了 RS232协议、按键处理、LED数码管显示和每秒加1数码显示。使用quartus ii 7.0 以上打开.-This is an example of verilog HDL language in the CPLD device EPM240 achieved RS232 agreement, deal button, LED digital tube display and digital display plus 1 per second. Quartus ii 7.0 use more than open.
Platform: | Size: 521216 | Author: 白蚁 | Hits:

[Other] S7_PS2_RS232

Description: 利用cpld作为cpu控制器将ps2中取得按键值通过串口传送给pc机-cpld verilog ps2 UART
Platform: | Size: 1438720 | Author: wphyl | Hits:

[Com Port] rs232

Description: 这是cpld，EPM240数据通信rs232程序，希望与大家分享-This is cpld, EPM240 data communication rs232 procedure, hoping to share with you
Platform: | Size: 132096 | Author: 蓝风 | Hits:

[SCM] ATmega128

Description: 简要介绍： 主要芯片： CPU:ATmega128L SRAM:SR61L256BS-8 CPLD:XILINX XC95144XL SFLASH:AT45DB081B ETHERNET:CS8900A USB:PDIUSBD12 LCD:122x32 LMC62_095_M POWER:LM2596S-3.3 RS232:MAX3232 软件：RS232,SRAM,CPLD调试通过，uCosII可以运行，ethernet部分没有完成，usb完成了一部分。 -HD MP3 USE MEGA128
Platform: | Size: 11170816 | Author: shi | Hits:

[VHDL-FPGA-Verilog] miniuart2

Description: 用ＶＨＤＬ在CPLD/FPGA上实现与PC机的RS232通信-This UART (Universal Asynchronous Receiver Transmitter) is designed to make an interface between a RS232 line and a wishbone bus, or a microcontroller, or an IP core. It works fine connected to the serial port of a PC for data exchange with custom electronic. It was built in the perspective to be very small, but efficient. It had to fit in a small FPGA. It is not suited to interface a modem as there is no control handshaking (CTS/RTS). It integrate two separate clocks, one for wishbone bus, the other for bitstream generation. This has the advantage to let the user bring his own desired frequency for the baudrate.
Platform: | Size: 2588672 | Author: 李涛 | Hits:

[VHDL-FPGA-Verilog] UART_TVHDL

Description:
Platform: | Size: 490496 | Author: liuxingxing | Hits:

[VHDL-FPGA-Verilog] RS232

Description: this code show how to use Altium to coding RS232 on FPGA-CPLD
Platform: | Size: 175104 | Author: fazel | Hits:

[VHDL-FPGA-Verilog] rs232

Description: 一个简单的verilog程序，实现PC发送数据给cpld，长篇累牍将数据回送给pc-A simple verilog program, the realization of PC to send data to the CPLD, dozen send data back to the PC
Platform: | Size: 1024 | Author: 杨胖 | Hits:
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