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[OS program] ddr2 VHDL原代码

Description: ddr2的仿真代码
Platform: | Size: 833330 | Author: kabtechnology@126.com | Hits:

[ARM-PowerPC-ColdFire-MIPS] Altera的IP源码8237

Description: 名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写，能被keilC51支持-renowned name of the company Synopsys 8051IP Core VHDL language, support can be keilC51
Platform: | Size: 207872 | Author: 上面的 | Hits:

[Graph Drawing] VGAsingl

Description: fpga显示控制器，利用vhdl语言实现，只能显示8色。-fpga display controller, using vhdl language, the only shows that eight colors.
Platform: | Size: 1024 | Author: lyc | Hits:

[Compress-Decompress algrithms] DDR2_sdram

Description: DDR2 的控制器，它是由LATTICE的编译器生成。-DDR2 controller, it is by the compiler-generated LATTICE.
Platform: | Size: 966656 | Author: 李国 | Hits:

[VHDL-FPGA-Verilog] DDR2_module_VHDL_test(Rev0.1)

Description: ddr 2 接口读写测试模块 ddr 2 接口读写测试模块 -ddr 2 interface test module ddr 2 read and write interface to read and write test module
Platform: | Size: 125952 | Author: 骑士 | Hits:

[VHDL-FPGA-Verilog] zbt_rd_vhdl_str_v1.0.0

Description: ddr2 controller功能控制,里面有四个模块-ddr2 controller functions to control, which has four modules
Platform: | Size: 1688576 | Author: li ji wei | Hits:

[VHDL-FPGA-Verilog] vga_control

Description: vga 控制器的verilog 源码 ，fpga上可实现图片的显示-vga controller Verilog source code, fpga achievable picture display
Platform: | Size: 1024 | Author: zys | Hits:

[VHDL-FPGA-Verilog] DDR2Controller

Description: DDR2 Controller DDR2 Controller
Platform: | Size: 312320 | Author: tg | Hits:

[VHDL-FPGA-Verilog] ddr2sdram_spartan3s700an.tar

Description: It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit - Diligent fully working.-It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit- Diligent fully working.
Platform: | Size: 1488896 | Author: under | Hits:

[Other] CODE

Description: DDR2源代码 DDR2源代码-ddr2 source code ddr2 source code ddr2 source code
Platform: | Size: 299008 | Author: 司炯 | Hits:

[Other] Micron_DDR

Description: DDR2 SDRAM 颗粒初始化以及读写操作时序-Particles as well as the DDR2 SDRAM initialization timing to read and write operations
Platform: | Size: 432128 | Author: robert.wang | Hits:

[VHDL-FPGA-Verilog] s3ask_ddr2

Description: DDR2-400样例源代码，用于Xilinx Spartan 3A/3AN Starter Kit-DDR2-400 sample source code for Xilinx Spartan 3A/3AN Starter Kit
Platform: | Size: 2612224 | Author: Joe Zhu | Hits:

[VHDL-FPGA-Verilog] c_xapp454

Description: 这是xilinx应用指南xapp454的中文版本。本应用指南说明与 Micron DDR2 SDRAM 器件连接时，Spartan™ -3 器件中 DDR2 SDRAM 存储器接口的实现。本文档先简单介绍了 DDR2 SDRAM 器件的特性，然后对 DDR2 SDRAM 存储器接口的实现进行了详细说明。-This is the xilinx application note xapp454 the Chinese version. This application note and the Micron DDR2 SDRAM device is connected, Spartan ™ -3 devices DDR2 SDRAM memory interface implementation. This document briefly describes the DDR2 SDRAM device features, and then the realization of DDR2 SDRAM memory interface is described in detail.
Platform: | Size: 217088 | Author: 陈阳 | Hits:

[Compress-Decompress algrithms] 49636967xapp935

Description: DDR2驱动方面的资料,很有用的。希望对大家有用-drive of DDR2
Platform: | Size: 347136 | Author: 王川 | Hits:

[VHDL-FPGA-Verilog] LPC2DDR2

Description: Module Function Description: This module allows a SPI ROM to be used in a LX/CS5536 system. Details are below: 1.Provide a memory window to the SPI EPROM at FFF80000h-FFFFFFFFh (512KB). 2.Provide an interface to the SPI bus to allow the SPI EPROM to be programmed. 3.Support DDR2 memory initial process. 4.Support LPC/SPI ROM switch using Hardware pin selection and Software setting method 5.Support LPC Memory Read/Write, LPC I/O Read/Write 6.Support SPI Chip Erase/Byte Program/Write Status/Read Status/Read Array -Module Function Description: This module allows a SPI ROM to be used in a LX/CS5536 system. Details are below: 1.Provide a memory window to the SPI EPROM at FFF80000h-FFFFFFFFh (512KB). 2.Provide an interface to the SPI bus to allow the SPI EPROM to be programmed. 3.Support DDR2 memory initial process. 4.Support LPC/SPI ROM switch using Hardware pin selection and Software setting method 5.Support LPC Memory Read/Write, LPC I/O Read/Write 6.Support SPI Chip Erase/Byte Program/Write Status/Read Status/Read Array
Platform: | Size: 8192 | Author: 吴羽中 | Hits:

[VHDL-FPGA-Verilog] ddr2_controller

Description: DDR2控制器设计原码,可以在FPGA上测试通过,并对外部的ddr memory进行读写访问.-DDR2 controller design of the original code, can be tested through the FPGA, and external ddr memory read and write access.
Platform: | Size: 52224 | Author: yanxp | Hits:

[VHDL-FPGA-Verilog] mcb_read_write

Description: 赛灵思 DDR2 用户接口程序 原创。希望对各位有用。-Xilinx DDR2 original user interface program. You want to be useful.
Platform: | Size: 2048 | Author: wenchunhong | Hits:

[VHDL-FPGA-Verilog] OK16bit

Description: 16BITS DDR2原理图 讲解 详细 学习用
Platform: | Size: 155648 | Author: zhangfuquan | Hits:

[VHDL-FPGA-Verilog] DDR2_16bit

Description: ddr2原理图设计，原厂电路图设计，很好很强大 16bit-ddr2 schematic design, the original schematic design, a very powerful 16bit
Platform: | Size: 155648 | Author: 田云钧 | Hits:

[VHDL-FPGA-Verilog] ddr2

Description: ddr2的功能控制模块，3部分，只要调取就可以。-ddr2 control codes
Platform: | Size: 5120 | Author: wenxin | Hits:
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