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[Documents] DDR2介绍及基于FPGA的控制器设计

Description: DDR2介绍及基于FPGA的控制器设计
Platform: | Size: 499712 | Author: zhidongguo2009@163.com | Hits:

[Graph Drawing] VGAsingl

Description: fpga显示控制器，利用vhdl语言实现，只能显示8色。-fpga display controller, using vhdl language, the only shows that eight colors.
Platform: | Size: 1024 | Author: lyc | Hits:

[Other] xapp858[1]

Description: XAPP858 - 利用 Virtex-5 FPGA 实现的高性能 DDR2 SDRAM 接口数据采集 本应用指南描述了用于实现 667 Mbps（333 MHz）高性能 DDR2 SDRAM 接口的控制器和数据采集的技巧。 本数据采集技巧使用了输入串行器/解串器（ISERDES）和输出串行器/解串器（OSERDES）的功能。-XAPP858-use Virtex-5 FPGA high-performance DDR2 SDRA M Interface Data Acquisition Guide describes the application for achieving 667 Mbps (333 MHz) high-performance DDR 2 SDRAM Interface controller and data acquisition techniques. The data collection techniques used serial input/Solution Series (ISERDES) and serial output/Solution Series (O Legacy) function.
Platform: | Size: 296960 | Author: mingming | Hits:

[VHDL-FPGA-Verilog] FPGAdesignXilinx

Description: 华为内部资料，关于FPGA设计的详细过程介绍，很不错的。本文档从FPGA器件结构出发以速度路径延时大小和面积资源占用率为主题描述在FPGA设计过程中应当注意的问题和可以采用的设计技巧。-Huawei internal information, with regard to detailed FPGA design process of introduction, it is good. This document from the FPGA device structure in order to speed the path delay and area the size of the theme of the occupancy rate of resource description in the FPGA design process should pay attention to the problems and design techniques can be used.
Platform: | Size: 1705984 | Author: 高超 | Hits:

[VHDL-FPGA-Verilog] vga_control

Description: vga 控制器的verilog 源码 ，fpga上可实现图片的显示-vga controller Verilog source code, fpga achievable picture display
Platform: | Size: 1024 | Author: zys | Hits:

[VHDL-FPGA-Verilog] OpenSPARC_DDR2_controller_RTL_Files

Description: 基于FPGA的DDR2控制程序，用verilog编写的。-FPGA-based DDR2 control procedures, prepared by using Verilog.
Platform: | Size: 30720 | Author: 王头 | Hits:

[VHDL-FPGA-Verilog] 1189152740

Description: DDR2 SDRAM 控制器的FPGA实现-DDR2 SDRAM controller FPGA to achieve
Platform: | Size: 84992 | Author: 白皓 | Hits:

[Software Engineering] fpga-pinball_for_c

Description: VHDL 基于FPGA 和VGA 接口的应用设计-vhdl
Platform: | Size: 223232 | Author: xietianjiao | Hits:

[VHDL-FPGA-Verilog] ddr2

Description: 基于Xilinx fpga的ddr2 控制器设计方法-Xilinx fpga-based controller design method of ddr2
Platform: | Size: 2793472 | Author: Zhao Bill | Hits:

[VHDL-FPGA-Verilog] s3ask_ddr2

Description: DDR2-400样例源代码，用于Xilinx Spartan 3A/3AN Starter Kit-DDR2-400 sample source code for Xilinx Spartan 3A/3AN Starter Kit
Platform: | Size: 2612224 | Author: Joe Zhu | Hits:

[VHDL-FPGA-Verilog] c_xapp260

Description: xilinx应用指南xapp260的中文翻译版本。利用 Xilinx FPGA 和存储器接口生成器简化存储器接口。本白皮书讨论各种存储器接口控制器设计所面临的挑战和 Xilinx 的解决方案，同时也说明如何使用 Xilinx软件工具和经过硬件验证的参考设计来为您自己的应用（从低成本的 DDR SDRAM 应用到像 667 Mb/sDDR2 SDRAM 这样的更高性能接口）设计完整的存储器接口解决方案。-The use of Xilinx FPGA and Memory Interface Generator to simplify memory interface. This white paper discusses the various memory interface controller design challenges facing Warfare and Xilinx solutions, but also explains how to use Xilinx Software tools and hardware-proven reference designs to be for your own With (from low-cost DDR SDRAM applications to such as 667 Mb/s This higher performance DDR2 SDRAM interface) design a complete deposit Storage device interface solution.
Platform: | Size: 1123328 | Author: 陈阳 | Hits:

[Software Engineering] DDR2_hardcore_userguide

Description: xillinx Spartan6 FPGA DDR 接口设计指南-xillinx Spartan6 FPGA DDR Interface Design Guidelines
Platform: | Size: 2324480 | Author: james | Hits:

[VHDL-FPGA-Verilog] ddr2_controller

Description: DDR2控制器设计原码,可以在FPGA上测试通过,并对外部的ddr memory进行读写访问.-DDR2 controller design of the original code, can be tested through the FPGA, and external ddr memory read and write access.
Platform: | Size: 52224 | Author: yanxp | Hits:

[VHDL-FPGA-Verilog] DDR_SDRAMDesignTutorials

Description: Altera公司的基于NIOSII设计DDR和DDR2内存的资料，很有帮助的，-Based on Altera' s DDR and DDR2 memory NIOSII design information, useful,
Platform: | Size: 3154944 | Author: iyoung | Hits:

[Software Engineering] DDR2deFPGAsheji

Description: 使用 Virtex-4 FPGA 器件实现DDR SDRAM控制器以及DDR2 SDRAM操作时序-Using the Virtex-4 FPGA devices to achieve DDR SDRAM and DDR2 SDRAM controller operation timing
Platform: | Size: 2525184 | Author: 张桃源 | Hits:

[VHDL-FPGA-Verilog] ~DDR2-Demonstration

Description: 基于Xilinx-FPGA的DDR2演示代码-DDR2 Reference design which Based on Xilinx-FPGA
Platform: | Size: 2839552 | Author: saladin | Hits:

[VHDL-FPGA-Verilog] c4gx_f896_host_ddr2a_odt

Description: ALTERA PCIE FPGA开发板（EP4C平台）DDR2内存测试代码-ALTERA PCIE FPGA development board (EP4C platform) DDR2 memory test code
Platform: | Size: 648192 | Author: liyilang | Hits:

[VHDL-FPGA-Verilog] Virtex-5-FPGA_DDR2_SDRAM_data

Description: Virtex-5 FPGA实现的高性能 DDR2 SDRAM数据采集，需要对V5有一定基础的人学习-Virtex-5 FPGA DDR2 SDRAM to achieve high-performance data acquisition, the need for V5 have to learn some basic
Platform: | Size: 436224 | Author: apple_rao | Hits:

[Documents] DDR2简明教程

Description: 一个关于关于如何在fpga中使用DDR2的教程，适合初学者(A tutorial on how to use DDR2 in FPGA, suitable for beginners)
Platform: | Size: 2383872 | Author: zxx233 | Hits:

[Documents] DDR2使用图文教程

Description: 一个关于FPGA的DDR2使用教程，含有大量操作截图(A DDR2 tutorial on FPGA, which contains a lot of operation screenshots)
Platform: | Size: 753664 | Author: zxx233 | Hits:
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