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[Embeded-SCM DevelopDDSsignalgen

Description: dds信号发生器-dds signal generator ask, am, fskdds signal generator ask, am, fskdds signal generator ask, am, fskdds signal generator ask, am, FSK
Platform: | Size: 3331072 | Author: appolo | Hits:

[SCMDDS

Description: 基于fpga,采用quartus2的DDS信号发生器,采用高速DAC908为数模芯片,并可通过51单片机送入调制信号进行FM调制-Based on the fpga, the use of the DDS signal generator quartus2 using DAC908 number of high-speed chip module, and passed into 51 single-chip FM modulation signal modulation
Platform: | Size: 2745344 | Author: 张新 | Hits:

[VHDL-FPGA-VerilogDDS1

Description: DDS信号发生器,能产生多种波形,正玄波,三角波,方波,频率可调,相位可调-DDS signal generator, can produce a variety of waveforms, are mysterious wave, triangle wave, square wave, frequency tunable, phase adjustable
Platform: | Size: 1108992 | Author: 张俊 | Hits:

[SCMDDS

Description: 基于AD9851的DDS信号发生器的c语言编程-AD9851 Based on the DDS signal generator of c language programming
Platform: | Size: 6144 | Author: tan | Hits:

[matlabDDS

Description: 用MATLAB中的SIMULINK工具实现DDS的仿真模型,不过这里的控制字是常量-SIMULINK with MATLAB tools in DDS realize the simulation model, but here the control word is a constant
Platform: | Size: 55296 | Author: zhangli | Hits:

[OtherDDSxinhaofashengqi

Description: 介绍了如何采用DDS原理进行信号发生器的设计,又需要的下-Introduced the principle of how to use DDS signal generator is designed and the needs of the next
Platform: | Size: 541696 | Author: 郑智文 | Hits:

[SCMDDS

Description: 用8051控制DDS信号发生器,产生1HZ-10MHz的正弦波/三角波/方波-DDS with 8051 control signal generator, producing the 1HZ-10MHz sine/triangle/square wave
Platform: | Size: 43008 | Author: 徐小平 | Hits:

[Otherdds

Description: dds signal generator with at90s2313
Platform: | Size: 917504 | Author: mohammad reza | Hits:

[VHDL-FPGA-Verilogvhdldds0000

Description: 采用fpga的hdl语言实现dds的信号发生器的设计,性能与传统相比明显提高。-Hdl language using FPGA implementation of the signal generator dds design, performance markedly improved compared with the traditional.
Platform: | Size: 172032 | Author: 李江 | Hits:

[VHDL-FPGA-VerilogDDS

Description: DDS信号发生器,利用VHDL实现,可根据频率控制字的改变输出不同频率的信号,最高可到达10MBPS-DDS signal generator, the use of VHDL realization of frequency control word in accordance with changes in output signals of different frequencies, the maximum arrival 10MBPS
Platform: | Size: 784384 | Author: 陈宇 | Hits:

[SCMDDS

Description: dds 正弦信号发生器步进100HZ 最高频率可达900kHZ 最低频率可大2.3Khz-dds signal generator sin walingbeam 100HZ
Platform: | Size: 989184 | Author: lin65505578 | Hits:

[Program docFPGA-DDS-FM

Description: DDS 调频信号发生器框图设计原理,有仿真测试结果-DDS signal generator FM Design Principle diagram
Platform: | Size: 69632 | Author: chenjiwei | Hits:

[VHDL-FPGA-Verilogdds

Description: dds信号发生器,硬件测试过,效果良好。文件包含整个fpga开发过程产生的所有文件-dds signal generator, the hardware tested to good effect. File contains the entire fpga development process of all documents generated
Platform: | Size: 232448 | Author: wdw | Hits:

[SCMDDS

Description: 这是一个用单片机驱动DDS信号发生器的程序-This is a DDS signal generator with a single chip driver program
Platform: | Size: 13312 | Author: xu | Hits:

[VHDL-FPGA-VerilogFPGA_DDS

Description: 基于FPGA的DDS信号发生器产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-FPGA-based VHDL source DDS signal generator and the test stimulus file matlab model simulation in modelsim adopted under
Platform: | Size: 14486528 | Author: 乐毅学 | Hits:

[Embeded-SCM DevelopDDS

Description: 基于DDS的信号发生器的设计,采用LCD进行显示。-Based on the design of DDS signal generator, with LCD display.
Platform: | Size: 3072 | Author: 万海青 | Hits:

[SCM51_mcu_DDS_signal_generator

Description: 该文件时基于单片机的DDS函数信号发生器,产生的波形为三种:三角波,正弦波,方波-The document function based on single chip DDS signal generator, waveform generated three types: triangle wave, sine wave, square wave
Platform: | Size: 71680 | Author: 郑道宝 | Hits:

[Other Embeded programDDS

Description: Verilog语言实现基于DDS技术的余弦信号发生器,输出位宽16Bit-Verilog language technology based on the cosine DDS signal generator, the output bit width 16Bit
Platform: | Size: 4096 | Author: 柏承建 | Hits:

[SCM51-DDS

Description: 基于51单片机 DDS 的信号发生器设计 (有源代码)-51 MCU-based design of DDS signal generator (source code)
Platform: | Size: 8415232 | Author: hezhigang | Hits:

[VHDL-FPGA-Verilogsignal-generator

Description: Design of DDS signal generator based on VHDL+FPGA, has been through the adjustable, can be directly used, simulation -DDS signal generator circuit design, Verilog source code, can be directly used, simulation
Platform: | Size: 2070528 | Author: 李静璐 | Hits:
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