Search - decryption verilog

Search - decryption verilog - List

[Crack Hack] Analyse_QQprotocol DL : 0: qq协议分析辅助，包括2次md5加密，tea加密解密-qq protocol analysis support, including the 2nd md5 encryption, encryption and decryption of tea
Update : 2025-02-17 Size : 149kb Publisher : huaiyu
[VHDL-FPGA-Verilog] SMS4_code DL : 0: 用Verilog实现国内第一个商用密码算法SMS4的加密和解密。-Using Verilog to achieve the first commercial cryptographic algorithm for encryption and decryption SMS4.
Update : 2025-02-17 Size : 204kb Publisher : 闫伟伟
[Crack Hack] aes_core DL : 0: Verilog实现AES加密算法密码模块作为安全保密系统的重要组成部分，其核心任务就是加密数据。分组密码算法AES以其高效率、低开销、实现简单等特点目前被广泛应用于密码模块的研制中。密码模块一般被设计成外接在主机串口或并口的一个硬件设备或是一块插卡，具有速度快，低时延的特点。而从整体发展趋势来看，嵌入式密码模块由于灵活，适用于多种用户终端、通信设备和武器平台，将会得到更加广泛的应用-AES encryption algorithm realize Verilog module password security system as an important part of its core mission is to encrypt the data. AES block cipher algorithm for its high efficiency, low overhead, simple features such as the current password is widely used in research and development modules. Password modules are generally designed to host external serial or parallel port of a hardware device or a card with a high speed, low latency characteristics. From the overall development trend, the embedded code module as a result of flexible and applicable to many user terminals, communications equipment and weapons platforms, will be more widely applied
Update : 2025-02-17 Size : 78kb Publisher : yuansuchun
[VHDL-FPGA-Verilog] md5 DL : 0: MD5 算法在Xilinx FPGA上的实现，希望对大家有用。-MD5 algorithm in Xilinx FPGA Implementation, in the hope that useful to everyone.
Update : 2025-02-17 Size : 10kb Publisher : 张开文
[VHDL-FPGA-Verilog] AES_RTL DL : 0: 使用Verilog HDL 實現AES硬體加解密-Realize the use of Verilog HDL hardware AES encryption and decryption
Update : 2025-02-17 Size : 15kb Publisher : 林夢魔
[Crack Hack] DES_Verilog DL : 0: 这是我用Verilog写的DES加解密程序,准确的说这是一份实验报告,里面不但有程序还有简单的注释[主要是针对仿真的波形的],我主要写的是主控部分,密钥生成部分参考了下版原康宏的程序.该程序即可加密也可解密,选用CycloneII器件即能跑到100Mhz以上.-This is what I used to write Verilog the DES encryption and decryption procedures, accurate to say that this is a test report, which not only have a simple Notes program [is mainly directed against the waveform simulation], I write is the main control part key generation is partly based on the next version of the original Yasuhiro procedures. The program can also be encrypted can be decrypted, CycloneII optional devices which can run more than 100Mhz.
Update : 2025-02-17 Size : 290kb Publisher : jesse
[Crack Hack] ECDSA_Verilog DL : 0: 椭圆曲线加解密算法的verilog实现，帮助初学者有效理解ECC算法。-Elliptic curve encryption and decryption algorithm verilog implementation, to help beginners understand the ECC algorithm is effective.
Update : 2025-02-17 Size : 3kb Publisher : 张勇奇
[Communication] dev_xts_gold DL : 0: xts-mode解密程序。verilog语言-xts-mode decryption
Update : 2025-02-17 Size : 6kb Publisher : renhuan
[Crack Hack] AES_verilog DL : 0: AES 128bit数据,128bit密钥加解密的verilog语言实现-AES 128bit data, 128bit key encryption and decryption of the verilog language implementation
Update : 2025-02-17 Size : 78kb Publisher : 刘蕊丽
[VHDL-FPGA-Verilog] rsa_IN_vhdl DL : 0: FULL SIMOLATION IN VHDL FOR RSA DECRYPTION
Update : 2025-02-17 Size : 1.93mb Publisher : HIMANSHU SINGH
[Crack Hack] HMAC-MD5 DL : 0: HMAC — MD 5算法的硬件实现，可以对初学者有一定得帮助。-HMAC- MD 5 algorithm for hardware implementation
Update : 2025-02-17 Size : 175kb Publisher : zhangchaoqi
[VHDL-FPGA-Verilog] Verilog_study_book DL : 0: 现代计算机与通讯系统电子设备中广泛使用了数字信号处理专用集成电路，它们主要用于数字信号传输中所必需的滤波、变换、加密、解密、编码、解码、纠检错、压缩、解压缩等操作。这些处理工作从本质上说都是数学运算。从原则上讲，它们完全可以用计算机或微处理器来完成。这就是为什么我们常用C、Pascal 或汇编语言来编写程序，以研究算法的合理性和有效性的道理。-Modern computer and communication systems are widely used in electronic equipment for digital signal processing application specific integrated circuit, which is mainly used for digital signal transmission required for filtering, transformation, encryption, decryption, encoding, decoding, EDAC, compression, decompression, etc. operation. The processing in essence is math. In principle, they can use the computer or microprocessor to complete. That is why we used C, Pascal, or assembly language to write programs to study the rationality and effectiveness of the algorithm logic.
Update : 2025-02-17 Size : 1.94mb Publisher : macray
[VHDL-FPGA-Verilog] aes DL : 0: verilog实现的AES-128加解密程序，FPGA验证通过-verilog implementation of AES-128 encryption and decryption process, FPGA verification through
Update : 2025-02-17 Size : 7kb Publisher : xie
[assembly language] verilog-for-AES-algorithm DL : 0: 介绍了verilog HDL语言对AES算法进行数据加解密。-Introduced the verilog HDL language to AES algorithm for data encryption and decryption.
Update : 2025-02-17 Size : 76kb Publisher : xiaochen
[Crack Hack] aes_core_latest.tar DL : 0: It is really recent AES encryption Decryption verilog code. It is working well! Just doenload and use!!
Update : 2025-02-17 Size : 170kb Publisher : Ho Joon Lee
[Crack Hack] AES DL : 0: AES加解密Verilog HDL源代码，具体的算法参照相关书籍，里面含有testbench-AES encryption and decryption Verilog HDL source code, reference books specific algorithm, which contains testbench
Update : 2025-02-17 Size : 8kb Publisher : 蒋晓云
[Other] trunk DL : 0: AES128加密解密verilog程序，通过modelsim验证过-AES128 encryption and decryption verilog program, verified by modelsim
Update : 2025-02-17 Size : 26kb Publisher : Frank CHOU
[VHDL-FPGA-Verilog] AES DL : 0: AES的加密解密verilog全部源代码-AES encryption and decryption verilog full source code
Update : 2025-02-17 Size : 6kb Publisher : 陈曦
[Crack Hack] AES-GF(2^4)^2 for sbox DL : 0: AES加解密程序，128bit数据位宽，其中sbox和混合列运算在复合域GF(2^4)^2上完成(An AES encryption and decryption program with 128 bits datawidth, which used GF(2^4)^2 for sbox and mixcolumn.)
Update : 2025-02-17 Size : 17kb Publisher : 酱瓶
[Crack Hack] apbtoaes128_latest.tar DL : 1: verilog实现的AES加解密程序，接口为APB总线。(AES encryption and decryption program implemented by Verilog)
Update : 2025-02-17 Size : 195kb Publisher : ssdgf

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