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[Other resource] xulieji

Description: 在FPGA上实现序列机 用的是Altera公司的DE1板子
Platform: | Size: 332701 | Author: YY | Hits:

[Other resource] smallkeybaord

Description: 用verilog写的4*4小键盘按键检测程序。本工程已经编译好。可以直接在Atera DE1 Fpga开发板上运行
Platform: | Size: 1594612 | Author: 王乔 | Hits:

[Other resource] altera_up_avalon_ps2

Description: 花了半个月才改好的Atera DE1/DE2 ps2 IP 驱动核。放在FPGA工程目录下可以直接使用。本IP能够驱动PS/2键盘和鼠标。使用时只要调用HAL目录下的文件即可以直接使用！
Platform: | Size: 27670 | Author: 王乔 | Hits:

[Other] FPGA开发板用户手册

Description: DE1用户手册，altera公司的ＦＰＧＡ开发板
Platform: | Size: 2126560 | Author: xx544712511@163.com | Hits:

[VHDL-FPGA-Verilog] xulieji

Description: 在FPGA上实现序列机 用的是Altera公司的DE1板子-In the FPGA to achieve sequence machine using Altera s DE1 board
Platform: | Size: 332800 | Author: YY | Hits:

[VHDL-FPGA-Verilog] UART

Description: 输入时钟20M，波特率为9600，实现串口收发功能，通过修改内部分频系数可实现其它波特率的收发-Input clock 20M, the baud rate for 9600, Serial transceiver functions, by modifying the frequency of some other baud rate coefficient can realize the transceiver
Platform: | Size: 7168 | Author: 杨启勇 | Hits:

[VHDL-FPGA-Verilog] smallkeybaord

Description: 用verilog写的4*4小键盘按键检测程序。本工程已经编译好。可以直接在Atera DE1 Fpga开发板上运行-Written using Verilog 4* 4 keypad keys detection procedures. The project has been compiled. Directly in the development of Atera DE1 Fpga board run
Platform: | Size: 1594368 | Author: 王乔 | Hits:

[VHDL-FPGA-Verilog] altera_up_avalon_ps2

Description: 花了半个月才改好的Atera DE1/DE2 ps2 IP 驱动核。放在FPGA工程目录下可以直接使用。本IP能够驱动PS/2键盘和鼠标。使用时只要调用HAL目录下的文件即可以直接使用！-Spent a good two weeks we have made some changes Atera DE1/DE2 ps2 IP-driven nuclear. On the FPGA project directory can be used directly. The IP to drive PS/2 keyboard and mouse. When used as long as the call HAL directory file that can be used directly!
Platform: | Size: 27648 | Author: 王乔 | Hits:

[VHDL-FPGA-Verilog] FPGA-DE1-PACMAN

Description: Pacman 4 DE1-FPGA-Board
Platform: | Size: 943104 | Author: bert1970 | Hits:

[Video Capture] video_board_schemtic1

Description: this the schemtic for hooking up a video encoding chip (SAA7121H) to a IDE connector so it can connect to a DE1 FPGA board or any other you fancy-this is the schemtic for hooking up a video encoding chip (SAA7121H) to a IDE connector so it can connect to a DE1 FPGA board or any other you fancy
Platform: | Size: 27648 | Author: ghost | Hits:

[Software Engineering] Mini_Proj3

Description: Embedded 16 bit adder designed and implemented on Altera FPGA DE1 board using SOPC system builder and tested with NIO2 software. Language:Verilog and C
Platform: | Size: 202752 | Author: binh | Hits:

[VHDL-FPGA-Verilog] DE1-Practice-VGA-display-

Description: 用altera的fpga设计的DE1开发板作为硬件平台实现VGA显示，verilog实现的，8种色彩，作为fpga驱动vga液晶的入门。DE1实践之VGA显示（8bit色彩）-Altera fpga design with the DE1 board as a hardware platform development VGA display, verilog implementation, 8 colors, as the introduction to fpga driver vga LCD--- DE1 Practice VGA display (8bit color)
Platform: | Size: 13312 | Author: wuwei | Hits:

[VHDL-FPGA-Verilog] DE1-verilog

Description: Altera公司推出最新开发板DE1。该资料为DE1的FPGA 代码，包括ADC，音频处理，视频输出等，供大家参考使用。-Altera Corporation introduced the latest development board DE1. The data for the DE1 FPGA code, including the ADC, audio processing, video output, etc., for your use and reference.
Platform: | Size: 11901952 | Author: 小陈 | Hits:

[VHDL-FPGA-Verilog] Pong

Description: ping pong game fpga DE1
Platform: | Size: 1414144 | Author: Lizza | Hits:

[Software Engineering] DE1_Audio_AdcDac

Description: FPGA DE1 AUDIO ADC/DAC CODE
Platform: | Size: 2048 | Author: KAMAL M ALMUTAIRI | Hits:

[VHDL-FPGA-Verilog] Soc_Audio_v5

Description: DE1 audio soc,xue xi audio process by Altera soc FPGA-DE1 audio soc
Platform: | Size: 62712832 | Author: 张山 | Hits:

[Game Program] de1_soc_nes

Description: DE1-SOC开发板上实现NES(小霸王游戏机)超级玛丽的功能(NES DE1-SOC development board (the game) super Marie function)
Platform: | Size: 4155392 | Author: nfchg | Hits:

[Other] minimig-de1-master

Description: minimig de1 fpga board
Platform: | Size: 20380672 | Author: algr86 | Hits:

[VHDL-FPGA-Verilog] ass

Description: FPGA sine wave, 让DE1学生版输出模拟信号。(analog ouput by DE1 developing board)
Platform: | Size: 1614848 | Author: leejohannes | Hits:

[VHDL-FPGA-Verilog] de1_build

Description: The codes in the book are targeted for the DE1 board. Minor modifications are needed for the DE2 board. This directory contains the modified codes. Detailed use is explained in the pdf file within the directory.
Platform: | Size: 1293312 | Author: davido | Hits:
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