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[VHDL-FPGA-Verilog] Freq_counter

Description: 本代码介绍了使用VHDL开发FPGA的一般流程，最终采用了一种基于FPGA的数字频率的实现方法。该设计采用硬件描述语言VHDL，在软件开发平台ISE上完成，可以在较高速时钟频率（100MHz）下正常工作。该设计的频率计能准确的测量频率在1Hz到100MHz之间的信号。使用ModelSim仿真软件对VHDL程序做了仿真，并完成了综合布局布线，最终下载到芯片Spartan-II上取得良好测试效果。-the code on the FPGA using VHDL development of the general process, finally adopted a FPGA-based digital frequency method. The design using VHDL hardware description language, the software development platform ISE completed, the higher speed clock frequency (100MHz) under normal work. The design of the frequency meter can be accurately measured in a frequency of 100MHz between Hz signal. Use ModelSim VHDL simulation software to do the simulation process, and completed a comprehensive layout cabling, downloaded to the final chip Spartan-II made good on the test results.
Platform: | Size: 515072 | Author: 许的开 | Hits:

[SCM] digital_cymometer

Description: 简易数字频率计利用复杂可编程逻辑器件FPGA,VHDL编程将所有功能模块集成在一块芯片上。功能模块包括时基脉冲发生器、计数器、数据锁存器和显示电路4部分。设计时先分别设计各功能模块，并调试得到正确仿真结果，然后将各个功能模块组合起来。最后作整体仿真、下载，得到实物。由于采用纯数字硬件设计制作，稳定性、可靠性远远高于使用单片机或模拟方式实现的系统，外围电路简单。该数字频率计达到预期要求，实现了可变量程测量，测量范围0.1Hz—9999MHz，精度可达0.1Hz。-Simple digital frequency meter using complex programmable logic device FPGA, VHDL programming integration of all functional modules on a single chip. Functional modules, including time-base pulse generator, counters, and display data latch circuit 4. Design before the design of various functional modules, respectively, and debugging simulation results correctly, and then combine the various functional modules. Finally, for the overall simulation, download, be kind. As a result of the production of digital hardware design, stability, reliability is far higher than the use of single-chip microcomputer or analog means of the system, a simple peripheral circuits. The digital frequency meter to achieve the desired requirements of the variable-range measurement, measuring range 0.1Hz-9999MHz, accuracy up to 0.1Hz.
Platform: | Size: 412672 | Author: 严术骞 | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: 用VHDL实现数字频率计,1. 时基产生与测频时序控制电路模块2. 待测信号脉冲计数电路模块3.锁存与译码显示控制电路模块4.顶层电路模块. -Using VHDL digital frequency meter, 1. Time-base generation and frequency measurement timing control circuit module 2. Analyte signal pulse counting circuit module 3. Latch and decoding display control circuit module 4. Top-level circuit module.
Platform: | Size: 13312 | Author: 侯治强 | Hits:

[VHDL-FPGA-Verilog] frequency

Description: 这个程序是基于等精度测频原理的频率计，用VHDL语言实现，频率测量测量范围1~9999；用4位带小数点数码管显示其频率，并且具有超量程、欠量程提示功能。-This procedure is based on the principle of frequency measurement accuracy, such as the frequency meter, using VHDL language, frequency measurement range 1 ~ 9999 with four decimal places with the frequency of the digital display and has a super-range, less range prompts.
Platform: | Size: 1243136 | Author: yato_logo | Hits:

[VHDL-FPGA-Verilog] 745221frequency

Description: 用Verilog HDL / VHDL实现的数字频率计（完整实验报告）-Using Verilog HDL/VHDL realization of digital frequency meter (complete test report)
Platform: | Size: 145408 | Author: 倪亮 | Hits:

[Other Embeded program] fequency

Description: 一款可用于数字频率计设计的IP核,使用该IP核科研构建基于SOPC技术的片上数字频率计，测频范围较宽。-A digital frequency meter using IP core
Platform: | Size: 203776 | Author: yzhuai | Hits:

[Other] cepin

Description: 基于等精度测频法的频率计测频模块，用VHDL 编写，在QUARTUS里面编译成功的-Such as precision frequency measurement method based on the frequency meter measuring frequency module, using VHDL written inside the compilation of success in the QUARTUS
Platform: | Size: 1024 | Author: 梁梁 | Hits:

[Industry research] dfbfdvbfdbfgbfgb153351bgfb

Description: : 条形码识别，直接运行程序即可； pdf417lib：二维条形码打印（输出为ps格式的文件），在书中第6章二维条形码打印部分有程序使用的说明； 条形码生成器源程序：生成一维条形码，直接运行程序即可； [8位数字频率计.rar] - 数字频率计~ VHDL 实现 可以实现频率的测量和现实的功能 8位 [hot.rar] - 图像分割是数字图像处理中的关键技术之一。图像分割是将图像中有意义的特征-tiaoxingma.rar]- barcode: barcode recognition, you can run the program directly pdf417lib: two-dimensional bar code printing (output ps format), in the book, Chapter 6, two-dimensional bar code printing part of a program using the instructions barcode generation device source: Build a one-dimensional bar code, you can run the program directly [8-bit digital frequency meter. rar]- digital frequency meter ~ VHDL implementation can be achieved and actual measurement of the frequency function of 8 [hot.rar]- Image Segmentation digital image processing of the key technologies. Image segmentation is the image characteristics of a meaningful
Platform: | Size: 1087488 | Author: ihba | Hits:

[assembly language] plj

Description: 这是一个频率计的源代码，用的是VHDL语言设计的，能够测量0-20KHZ的频率！-This is a frequency meter of the source code, using the VHDL language design, can measure 0-20KHZ frequency!
Platform: | Size: 4586496 | Author: biao | Hits:

[VHDL-FPGA-Verilog] plj

Description: 数字频率计 在1秒内对被测信号进行计数，并将数据送至控制器，控制器根据数据自动选档，量程分为0--10KHz 、10KHz --100KHz 、100KHz --1MHz 三档。 数据采用记忆显示方式，即计数过程中不显示数据，待计数过程结束以后，显示计数结果，并将此显示结果保持到下一次计数结束。-Digital frequency meter in 1 second count of the measured signals and data sent to the controller, the controller automatically selected according to the data file range into 0- 10KHz, 10KHz- 100KHz, 100KHz- 1MHz third gear. Data using memory display, the counting process that does not display data until after the end of the counting process, the results show that counts, and this shows the results remain to the end of the next count.
Platform: | Size: 55296 | Author: xdq | Hits:

[VHDL-FPGA-Verilog] freqtest

Description: 对复杂大规模可编程器件的特点，提出了一种新的数字频率计的实现方法。在QutusⅡ开发软件环境下，采用硬件编程语言VHDL，实现了数字频率计的设计。经过仿真，并下载验证。能够实现测频功能。-The complex features of large-scale programmable devices, a new realization method of digital frequency meter. In Qutus Ⅱ software development environment, using the hardware programming language VHDL, to achieve the design of digital frequency meter. After simulation, and download verified. Frequency measurement function can be achieved.
Platform: | Size: 193536 | Author: 依然 | Hits:

[VHDL-FPGA-Verilog] VHDL-djdplj

Description: 基于VHDL语言的十进制等精度频率计的设计，采用VHDL语言，运用自顶向下的设计思想， 将系统按功能逐层分割的层次化设计方法，使用Quartus8.0开发环境，实现了频率计的设计。-VHDL language based on the decimal precision frequency meter, etc. The design, using VHDL language, the use of top-down design, the system is divided by function layer hierarchical design method, the use of Quartus8.0 development environment, to achieve a frequency meter design.
Platform: | Size: 228352 | Author: ldd | Hits:

[VHDL-FPGA-Verilog] fsh

Description: 这是我的毕业可用8位的LED显示，有小数点的。设计哦，可以用的。可供参考-VHDL-based digital frequency meter With the rapid development of electronic technology, FPGA/CPLD appear in its high-speed, high reliability, series parallel mode of outstanding merit widely used in the electronic design, and EDA design represents the future direction. In this paper, based on the principle of equal precision frequency meter measuring frequency is a typical application. Through the FPGA using VHDL hardware description programming language, in addition to the plastic part of the measured signal, key input part and the digital display part, the rest all in one FPGA chip implementation, such as 8-bit digital precision frequency meter. Using Quartusll integrated development environment for editing, synthesis, wave simulation, and download to the FPGA, by the actual circuit testing. And other precision frequency meter has high availability and reliability, high precision, and accuracy varies with frequency. System frequency measurement range of up to 0-25MHz, the frequency m
Platform: | Size: 4354048 | Author: 战魔 | Hits:

[VHDL-FPGA-Verilog] FPGA-VHDL-dengjingduc

Description: 本文介绍了基于VHDL语言的十进制等精度频率计的设计，采用VHDL 语言，运用自顶向下的设计思想，将系统按功能逐层分割的层次化设计方法，使用Quartus8.0开发环境，实现了频率计的设计。 -This article describes the decimal-based VHDL, and other precision frequency meter design, using VHDL language, the use of top-down design, the system is divided by function layer hierarchical design method, the use of Quartus8.0 development environment, implemented frequency meter design.
Platform: | Size: 280576 | Author: 筱诺 | Hits:

[VHDL-FPGA-Verilog] Frequency-counter

Description: 基于FPGA的频率计设计。通过FPGA运用、 HDL编程，利用FPGA(现场可编程门阵列)芯片设计了一个8位数字式等精度频率计，该频率计的测量范围为0-100MHZ，利用QUARTUS II集成开发环境进行编辑、综合、波形仿真，并下载到CPLD器件中，经实际电路测试，仿真和实验结果表明，该频率计有较高的实用性和可靠性。-Frequency counter FPGA-based design. By using FPGA, VHDL programming, the use of FPGA (field programmable gate array) chip design an 8-bit digital precision frequency meter, etc., the frequency meter measurement range of 0-100MHZ, using QUARTUS II integrated development environment for editing, synthesis, simulation waveforms, and downloaded to the CPLD device, the actual circuit testing, simulation and experimental results show that the frequency counter has a higher availability and reliability.
Platform: | Size: 595968 | Author: 吴亮 | Hits:

[VHDL-FPGA-Verilog] Lantern---the-frequency-meter

Description: 可编程器件SOC的“彩灯-频率计”教学PPT，内含代码。 采用VHDL语言，感兴趣的同学可以看看。-Programmable devices SOC Lantern- frequency meter teaching PPT, containing the code. Using VHDL language, interested students can take a look.
Platform: | Size: 214016 | Author: fox | Hits:

[VHDL-FPGA-Verilog] celiang

Description: 采用等精度测量方法的频率计的VHDL实现。-Such as precision measurement method using a frequency meter of VHDL.
Platform: | Size: 1024 | Author: presentlee | Hits:

[Software Engineering] precision-frequency-meter-design

Description: 基于51软IP核的等精度频率计设计，利用altera提供的软51ip核，用VHDL语言实现的-Based on 51 soft IP cores, such as precision frequency meter design, the use of the software provided 51ip altera core, using VHDL language
Platform: | Size: 3406848 | Author: 刘斌 | Hits:

[VHDL-FPGA-Verilog] Digital-frequency-meter

Description: 用VHDL完成12位十进制数字频率计的设计及仿真-Using VHDL completed 12 decimal digits frequency of the design and simulation
Platform: | Size: 438272 | Author: wuyuezhen | Hits:

[Other] Digital-frequency-meter

Description: 针对复杂大规模可编程器件的特点,提出了一种新的数字频率计的实现方法。在MAXPLUSII开发软件环境下,采用硬件编程语言VHDL,实现了数字频率计的设计。-According to the characteristics of complex large-scale programmable devices, the proposed implementation of a new digital frequency meter. In MAXPLUSII software development environment, using hardware programming language VHDL, to achieve a digital frequency meter design
Platform: | Size: 3072 | Author: 吴家 | Hits:
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