Description: 移位寄存器,异步清零,异步置数,左移右移可控,具有循环移位功能-Shift Register, Asynchronous Clear, asynchronous purchase the number of controllable left shifted to right with a cyclic shift function Platform: |
Size: 197632 |
Author:郭明 |
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Description: vhdl编程的，移位寄存器，八位，支持左移，右移-VHDL programming, shift register, 8, support the left, shifted to right Platform: |
Size: 11264 |
Author:wangjun |
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Description: 用Verilog实现的移位寄存器，可以实现左移、右移等功能-Using Verilog implementation of the shift register, you can achieve the left, shifted to right and other functions Platform: |
Size: 3072 |
Author:huhahuha |
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Description: 用89C51串行口外接CD4094移位寄存器扩展8位并行口，8位并行口的每位都接一个发光二极管，要求发光二极管从左到右以一定延迟轮流显示，并不断循环。-Using 89C51 external serial port expansion CD4094 shift register 8-bit parallel port, 8-bit parallel port of each one, all light-emitting diodes, light emitting diodes require a certain delay in rotation from left to right shows, and continue the cycle. Platform: |
Size: 1024 |
Author:wfq |
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Description: 一个4比特移位寄存器,活跃在不断上升的边缘的时钟。登记应能转移左、右移,接受连续剧和平行(负荷)输入,而有一个异步预设(“1111”)和清晰的(“0000”)的能力。-a 4-bit shift register which is active on the rising edge of the clock. The register should be able to shift left, shift right, accept a serial and parallel (load) input, and have an asynchronous preset (“1111”) and clear(“0000”) capability. Platform: |
Size: 26624 |
Author:sunzhongyuan |
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Description: vhdl,双向移位寄存器，实现置数，左移及右移操作-vhdl, bi-directional shift register to achieve set the number of left and right shift operation Platform: |
Size: 32768 |
Author:王晓虎 |
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Description: An universal shift register performs the following tasks load, right shift ,left shift and parallel load as the selection inputs are 00,01,10,11 respectively. Such a register is implemented here in Quartus. Platform: |
Size: 1024 |
Author:sidd |
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Description: A simple realisation code of a shift register written on VHDL in Quartus II for Cyclone II. The programm can store or shift the input data to left or right depending on which mode is chosen.Can be useful for the students. Platform: |
Size: 158720 |
Author:Dave |
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Description: 电子密码锁
功能如下:
l、按键接口的设计
包括：
1）键盘扫描电路
2）弹跳消除电路
3）键盘译码电路
4）按键存储电路
2、密码锁的控制电路设计
包括：
1）按键的数字输入、存储及清除
2）功能按键的功能设计
3）移位寄存器的设计与控制
4）密码清除、变更、存储、激活电锁电路
5）密码核对、解除电锁电路
3、输出七段显示电路的设计
包括：
1）数据选择电路
2）BCD对七段显示译码电路
3）七段显示扫描电路
密码锁功能说明：
1、 数据输入：每按一个数字键，就输入一个数值，并在显示器上的最右方显示出该数值，并将先前已经输入的数据依序左移一个数字位置。
2、数码清除：按下此键可清除前面所有的输入值，清除成为“0000”。
3、密码更改：按下此键时将日前的数字设定成新的密码。
4、激活电锁：按下此键可将密码锁上锁。
5、解除电锁：按下此键会检查输入的密码是否正确，密码正确即开锁。
-Electronic locks
l, key interface design
Include:
1) The keyboard scanning circuit
2) bounce elimination circuit
3) Keyboard decoding circuit
4) The button memory circuit
2, the lock control circuit design
Include:
1) Press the digital input, storage and removal
2) The functional design of function keys
3) Design and Control of the shift register
4) remove the password, change, storage, activate the electric lock circuit
5) The password check, the lifting power lock circuit
3, the output of seven-segment display circuit
Include:
1) data selection circuit
2) BCD seven segment display decoder circuit of
3) seven segment display scanning circuit
Password Lock Function:
1, the data entry: Each press a number key to enter a value, and in the far right on the display shows the number and order of input data previously left a number of locations.
2, Digital Clear: Press this key to clear all previous input values , clear Platform: |
Size: 130048 |
Author:ldong1989 |
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Description: 此实验实现一个8位的循环移位寄存器，移位的频率是2Hz，移位的方向（左移或是右移）可控。为了能显示移位的结果，我们采用一个数码管的8个段来表示这个寄存器的值。-The experimental realization of an 8-bit cyclic shift register, the shift frequency is 2Hz, the shift in the direction (left or right) control. In order to show the result of the shift, we use a digital eight segments to represent the value of this register. Platform: |
Size: 342016 |
Author:王晨 |
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Description: 移位寄存器设计
整个电路由一个主时序进程完成；在每一个时钟的上升沿，根据mode[1:0]的值进行清零、左移或右移操作，在主时序进程中由case语句完成；移位操作由for….loop语句完成8位十六进制数逐位移动。-Shift register design the entire circuit is completed by a master timing process each rising edge of the clock, according to the value of the mode [1:0] is cleared, the left or right to operate in the master timing process completed by the case statement shift operation to complete the 8-digit hexadecimal number of bit-wise move for .... loop statement. Platform: |
Size: 397312 |
Author:吴胜兵 |
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Description: 移位寄存器的设计与仿真
移位寄存器是既能寄存数据，又能使数据移位的电路。所谓移位功能，就是寄存在电路中的数据，可在移位脉冲的作用下，依次左移或右移。
移位寄存器不仅能用来存储数据，还能用来进行加减乘除的运算，以及串并数据转换，始终分频等，是应用最广泛的数字器件之一。
-Design and Simulation of the shift register are both hosting the data shift register, and can make the data shift circuit. The so-called shift function, is registered in the data circuit, a pulse may be shifted under the action of the left or right turn. The shift register can be used not only to store data, but also used for arithmetic operations, as well as string and data conversion, always divide, is one of the most widely used digital devices. Platform: |
Size: 3072 |
Author:Zero Liang |
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Description: 请设计一个4位的位移寄存器，要求如下：
1） 异步复位
2） 同步加载
3） 能够完成左移，右移。位移的方式能够支持算术，逻辑，和循环位移。
4） 完成仿真，证明功能正确。
5） 能看到综合结果。
注： 不需要一个bit的输入位，并行加载即可，输出也采用并行输出 -Please design a 4 bit shift register, requirements are as follows:
1) asynchronous reset
2) synchronous loading
3) to complete the shift left, right. The displacement mode can support the arithmetic, logical, and cyclic displacement.
4) to complete the simulation, prove the function correctly.
5) can see the comprehensive results.
Note: do not need a bit input, parallel output load can also use the parallel output. Platform: |
Size: 29696 |
Author:Jin |
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Description: shift register 7495 four d flip flop 5 mux
5495A/DM7495
4-Bit Parallel Access Shift Registers
General Description
These 4-bit registers feature parallel and serial inputs, parallel
outputs, mode control, and two clock inputs. The registers
have three modes of operation.
Parallel (broadside) load
Shift right (the direction QA toward QD)
Shift left (the direction QD toward QA)
Parallel loading is accomplished by applying the four bits of
data and taking the mode control input high. The data is
loaded into the associated flip-flops and appears at the outputs
after the high-to-low transition of the clock-2 input. During
loading, the entry of serial data is inhibited.
Shift right is accomplished on the high-to-low transition of
clock 1 when the mode control is low shift left is accomplished
on the high-to-low transition of clock 2 when th-shift register 7495 four d flip flop 5 mux
5495A/DM7495
4-Bit Parallel Access Shift Registers
General Description
These 4-bit registers feature parallel and serial inputs, parallel
outputs, mode control, and two clock inputs. The registers
have three modes of operation.
Parallel (broadside) load
Shift right (the direction QA toward QD)
Shift left (the direction QD toward QA)
Parallel loading is accomplished by applying the four bits of
data and taking the mode control input high. The data is
loaded into the associated flip-flops and appears at the outputs
after the high-to-low transition of the clock-2 input. During
loading, the entry of serial data is inhibited.
Shift right is accomplished on the high-to-low transition of
clock 1 when the mode control is low shift left is accomplished
on the high-to-low transition of clock 2 when th Platform: |
Size: 306176 |
Author:chaitu |
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Description: 一个具有置位、复位、左移和右移功能的八位移位寄存器/“01011010”序列检测器。移位寄存器电路端口为：异步清零输入端口rst，输入时钟clk，置数判断输入端口load，移位类型判断输入端口m，数据输入端口data[7:0]，输出端口q[7:0]。序列检测器电路端口为：异步清零输入端口rst，输入时钟clk，串行数据输入端口d，输出标志端口s。(A eight bit shift register / 01011010 sequence detector with set, reset, left shift, and right shift function. Shift register circuit port is: Asynchronous Clear input port rst, input clock CLK, set the number to determine the input port load, shift type to determine the input port m, data input port data[7:0], output port q[7:0]. The sequence detector circuit port is: Asynchronous Clear input port rst, input clock CLK, serial data input port D, output flag port s.) Platform: |
Size: 94208 |
Author:白学
|
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Search - left to right shift register