Description: 这是8位微处理器的Verilog源代码，可以欠在Flex10k10里面-This is the 8-bit microprocessor Verilog source code, can they owed in Flex10k10 Platform: |
Size: 95232 |
Author:李无志 |
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Description: This a set of notes I put together for my Computer Architecture
class in 1990. Students had a project in which they had to model a
microprocessor architecture of their choice. They used these notes to
learn VHDL. The notes cover the VHDL-87 version of the language.
Not all of the language is covered (about 95％).
You may use this booklet for your own personal learning purposes.
You may not use it for profit (eg, selling copies of it, using it in a
course for which people pay, etc). If you want to make use of it
beyond these conditions, contact me and we can come to some
arrangement.
-This a set of notes I put together for my Co. mputer Architecture class in 1990. Students ha d a project in which they had to model a microproc essor architecture of their choice. They used t hese notes to learn VHDL. The notes cover the Volume L-87 version of the language. Not all of the lang uage is covered (about 95%). You may use this boo klet for your own personal learning purposes. Y ou may not use it for profit (eg, selling copies of it, using it in a course for which people pay, etc). If you want to make use of it beyond these co nditions. contact me and we can come to some arrangement. Platform: |
Size: 245760 |
Author:罗春晖 |
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Description: This is a set of notes I put together for my Computer Architecture
class in 1990. Students had a project in which they had to model a
microprocessor architecture of their choice. They used these notes to
learn VHDL. The notes cover the VHDL-87 version of the language.
Not all of the language is covered (about 95％).
-This is a set of notes I put together for my Co. mputer Architecture class in 1990. Students ha d a project in which they had to model a microproc essor architecture of their choice. They used t hese notes to learn VHDL. The notes cover the Volume L-87 version of the language. Not all of the lang uage is covered (about 95%). Platform: |
Size: 237568 |
Author:罗春晖 |
Hits:
Description: Intel微处理器8088的VHDL实现，可以用ModelSim进行仿真测试。-Realization of intel microprocessor 8088 in VHDL language, and can be tested and simulated with ModelSim. Platform: |
Size: 604160 |
Author:卢刚 |
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Description: 4位微处理器系统的顶层描述代码，本人亲自测试，代码很简单。明了。内容无毒。放心下载使用-4 top-level description of the microprocessor system code, I personally tested the code is very simple. Clear. The content of non-toxic. Download ease the use of Platform: |
Size: 1024 |
Author:yanyinhong |
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Description: 这是8位微处理器的Verilog源代码，可以欠在Flex10k10里面-This is the 8-bit microprocessor Verilog source code, can they owed in Flex10k10 Platform: |
Size: 90112 |
Author:hbei |
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Description: Prawn is a simple eight-bit microprocessor based on the sample processor described in Chapter 9 of "VHDL : Analysis and Modeling of Digital Systems"by Z. Navabi, McGraw-Hill,Inc. 1993. We have added some features such as interrupt, stack and some conditions for conditional branch to the example in the book.
-Prawn is a simple eight-bit microprocessor based on the sample processor described in Chapter 9 of "VHDL : Analysis and Modeling of Digital Systems"by Z. Navabi, McGraw-Hill,Inc. 1993. We have added some features such as interrupt, stack and some conditions for conditional branch to the example in the book.
Platform: |
Size: 698368 |
Author:ying |
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Description: MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed
below.
Features
Hardware Features
• Data Path Width 32 bits, with Four stage pipeline.
• Mixed 16/32 bit instructions for code density
• Von Neumann Architecture (Data and Instruction in the same
address space).
• Sixteen, 32 bit General Purpose Registers.
• Four USER defined instructions (with Register File Write back
capability).-MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed
below.
Features
Hardware Features
• Data Path Width 32 bits, with Four stage pipeline.
• Mixed 16/32 bit instructions for code density
• Von Neumann Architecture (Data and Instruction in the same
address space).
• Sixteen, 32 bit General Purpose Registers.
• Four USER defined instructions (with Register File Write back
capability). Platform: |
Size: 3395584 |
Author:hfayed |
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Description: 支持十条指令的微处理器 包括add sub mov mvi jmp jz in out sti lda微指令 支持8个寄存器 16位数据总线 地址总线 -Supports 10 microprocessor instructions, including add sub mov mvi jmp jz in out sti lda microinstruction registers support 8 data bus 16-bit address bus Platform: |
Size: 1074176 |
Author:张梦 |
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Description: 一个微处理器的Verilog代码，根据英文书籍《数字设计与架构》中的例子而写，能够运行MIPS指令，能正确执行跳转指令。通过modelsim仿真，含测试代码。-Verilog code for a microprocessor, according to the English book " Digital Design and Architecture" was written in the example, to run MIPS instructions to jump correctly. By modelsim simulation, with test code. Platform: |
Size: 208896 |
Author:楚寒 |
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Description: In embedded systems, the processor that we choose for our design may not come with built-in peripherals. Therefore, designers will have to implement these devices in hardware keeping in mind that they will need to interface to the processor. In this lab we will design a simplified UART (Universal Asynchronous Reciever Transmitter) in VHDL and download it to the FPGA on the XS40 baord.
Serial communication is often used either to control or to receive data from an embedded microprocessor. Serial communication is a form of I/O in which the bits of a byte begin transferred appear one after the other in a timed sequence on a single wire. Serial communication has become the standard for intercomputer communication. In this lab, we ll try to build a serial link between 8051 and PC using RS232.
Platform: |
Size: 374784 |
Author:mezzich |
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