Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - motion verilog

Search list

[Other resource] MotionEstimation_project_code

Description: Use verilog and VHDL to implement the Motion Estimation function, work as the hardware accelerator.
Platform: | Size: 315929 | Author: Ray Luo | Hits:

[VHDL-FPGA-Verilog] bbb

Description: AVS运动补偿电路的VLSI设计与实现 提出了一种基于AVS标准的高效的运动补偿电路硬件结构，该设计采用了8 X 8块级流 水线操作，运动矢量归一化处理和插值滤波器组保证了流水线的高效运行以及硬件资源的最优 利用。采用Verilog语言完成了VLSI设计，并通过EDA软件给出仿真和综合结果。-AVS motion compensation circuit of VLSI Design and Implementation of a standard based on the AVS motion compensation circuit efficient hardware structure, the design used 8 X 8 block-level pipelining, the normalized motion vector processing and interpolation filter bank guarantee efficient operation of the pipeline, as well as the optimal use of hardware resources. Using Verilog language completed VLSI design and EDA software through simulation and synthesis results.
Platform: | Size: 216064 | Author: sss | Hits:

[VHDL-FPGA-Verilog] MotionEstimation_project_code

Description: Use verilog and VHDL to implement the Motion Estimation function, work as the hardware accelerator.
Platform: | Size: 315392 | Author: Ray Luo | Hits:

[Special Effects] Inter_mv_decoding

Description:
Platform: | Size: 8192 | Author: haifeng | Hits:

[Other] deep_LabVIEW_FPGA

Description: NI 通过LabVIEW FPGA 模块和可重复配置I/O(RIO)硬件设备，为测量和控制系统中整合FPGA 技术的 灵活性提供了直观且现成可用的解决方案。您可以使用LabVIEW图形化编程定义FPGA 芯片上的逻辑 功能，您不需要任何的有关底层硬件描述语言(HDLs)的知识，如VHDL 或是Verilog，也不需要了解板 卡级硬件设计，就可以将FPGA 芯片嵌入到NI 可重复配置I/O 系列硬件目标当中。另外，LabVIEW还 可以让您轻松地集成图象采集/分析、运动控制，以及CAN 和RS232 等工业通信功能。-Through the LabVIEW FPGA Module and NI reconfigurable I/O (RIO) hardware device, for measurement and control systems integrate the flexibility of FPGA technology provides the intuitive and readily available solution. You can use the LabVIEW graphical programming custom FPGA logic functions on a chip, you do not need any of the underlying hardware description languages (HDLs) knowledge, such as VHDL or Verilog, do not need to understand the board-level hardware design, it can be FPGA chip embedded into the NI reconfigurable I/O family of hardware Goals. In addition, LabVIEW also allows you to easily integrate image capture/analysis, motion control, as well as CAN and RS232 communication industries.
Platform: | Size: 274432 | Author: 侯yl | Hits:

[VHDL-FPGA-Verilog] yedek_son

Description: a basic Mode Decision hardware for Variable Block Size Motion Estimation in verilog
Platform: | Size: 2048 | Author: dumbmage | Hits:

[VHDL-FPGA-Verilog] MODELSYS

Description: 用verilog编写的运动自适应去隔行算法 表扩边缘检测 sad最小值编写-Verilog written with motion-adaptive deinterlacing algorithm detects the edge of the table to expand the minimum write sad
Platform: | Size: 10871808 | Author: 权晶 | Hits:

[VHDL-FPGA-Verilog] PCI_top

Description: 这是PCI运动控制卡的核心代码，我的一个项目程序，很好用，verilog 语言编写。-This is a PCI motion control card core code, I have a project program, easy to use, verilog language.
Platform: | Size: 1516544 | Author: 胡红伟 | Hits:

[hardware design] shiyan

Description: 0到59分59秒运动计时器，带有复位开始暂停按键功能(0 to 59 minutes and 59 seconds of motion timer with reset pause button start function)
Platform: | Size: 534528 | Author: SFSGE24 | Hits:

CodeBus www.codebus.net