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[Mathimatics-Numerical algorithms] PISO

Description: cfd经典PISO算法的FORTRAN程序
Platform: | Size: 6670 | Author: cdx | Hits:

[Mathimatics-Numerical algorithms] piso-不可压流求解器.rar

Description: 求解不可压流simple算法的PISO源程序
Platform: | Size: 5885 | Author: xgdbeih | Hits:

[Mathimatics-Numerical algorithms] PISO

Description: cfd经典PISO算法的FORTRAN程序-CFD classic FORTRAN procedure PISO algorithm
Platform: | Size: 6144 | Author: cdx | Hits:

[MPI] piso

Description: 本程序完成流水线并行提取等值面功能，采用VTK可视化程序开发包编写-This process is complete pipelined parallel isosurface extraction function, using VTK visualization program development package prepared
Platform: | Size: 79872 | Author: 李若愚 | Hits:

[VHDL-FPGA-Verilog] PiSo

Description: 8位并行输入的数转换成串行输出，是基于高级硬件编程语言VHDL编写的。-8-bit parallel input into serial output digital conversion is based on the high-level hardware programming language VHDL prepared.
Platform: | Size: 195584 | Author: zhangzhen | Hits:

[GIS program] Parallel_Input_Serial_Outrut_4bits_ShiftRegister_

Description: it is a very good piso shift register>-it is a very good piso shift register>
Platform: | Size: 1024 | Author: aya | Hits:

[VHDL-FPGA-Verilog] PISO

Description: It is then register ( shifter) PISO ( Parallel - in, serial - out)-It is then register ( shifter) PISO ( Parallel- in, serial- out)
Platform: | Size: 1024 | Author: L.S | Hits:

[Algorithm] episo

Description: 适用于Engine计算的经典PISO算法-the classic PISO algorithm for the Engine calculation
Platform: | Size: 6144 | Author: sunmingbo | Hits:

[VHDL-FPGA-Verilog] UART

Description: the uart transmitter and receiver are used to design the data transmission for 8bit sipo and piso in verilog
Platform: | Size: 1024 | Author: prabakaran | Hits:

[VHDL-FPGA-Verilog] PISO

Description: this code is designed to perform parallel to serial operation it is very essential in every design
Platform: | Size: 161792 | Author: kimo | Hits:

[VHDL-FPGA-Verilog] piso.txt

Description: PISO implemented in VHDL.
Platform: | Size: 1024 | Author: rambletamble | Hits:

[Other] PISO

Description: PISO程序用来计算流场，尤其对非稳态流场的计算非常有效。-PISO program used to calculate the flow field, especially for the calculation of unsteady flow field is very effective.
Platform: | Size: 6144 | Author: wangtai | Hits:

[VHDL-FPGA-Verilog] new-piso

Description: its hdl code and test bench for paralell in serial out design...written in verilog and by haneesh
Platform: | Size: 2048 | Author: haneesh | Hits:

[VHDL-FPGA-Verilog] SIPO-PISO-register

Description: Package contains two VHDL module: one for serial in and parallel out (SIPO) register and other for parallel in and serial out (PISO) register.
Platform: | Size: 1024 | Author: zpatel | Hits:

[Data structs] PISO-agthrithe

Description: fortra编写的经典PISO算法，很实用-the PISO algorithm fortra written in classic, very practical
Platform: | Size: 6144 | Author: zhangle | Hits:

[Algorithm] PISO-algorithm-source

Description: CFD数值模拟，经典PISO算法程序源程序代码。-CFD numerical simulation, classic PISO algorithm source code.
Platform: | Size: 6144 | Author: vanadium609 | Hits:

[Algorithm] PISO-CODE

Description: 计算流体动力学和热传递书上的一个 PISO算法-A PISO CODE OF COMPUTATIONAL FLUID DYNAMICS AND HEAT TRANSFER
Platform: | Size: 6144 | Author: Lianhua Ma | Hits:

[Documents] PISO-2D-CARTESIAN-MAIN

Description: PISO 2D CARTESIAN UNSTEADY CODE
Platform: | Size: 8192 | Author: jjaime1991 | Hits:

[VHDL-FPGA-Verilog] basic verilog codes

Description: Basic Verilog code includes RING and Johnson counters, Up-down counters, RAM, ROM, SIPO, PISO, SISO, PIPO, Mealy and Moore FSM codes
Platform: | Size: 9386 | Author: spgp1306 | Hits:

[Windows Develop] unidaq_dio

Description: 台湾鸿格数据采集卡PISO-730A驱动程序(Taiwan hung grid data acquisition card PISO-730A driver)
Platform: | Size: 854016 | Author: badden | Hits:
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