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[Other resource] sin_generator

Description: 在quartus 11 5.1 里用VHDL编写的正弦波发生器，经过仿真通过
Platform: | Size: 246527 | Author: 郭翠双 | Hits:

[Embeded-SCM Develop] ddsquartus

Description: 使用QUARTUS 2编译的DDS的源码-QUARTUS use two compiled the DDS source
Platform: | Size: 533504 | Author: 吴 | Hits:

[VHDL-FPGA-Verilog] qqq

Description: 数字滤波器的vhdl源代码.在quartus上运行过,里面还有matlab的仿真文件.-Digital filter of the VHDL source code. In Quartus run-off, along with the simulation matlab file.
Platform: | Size: 26624 | Author: 萧勇 | Hits:

[VHDL-FPGA-Verilog] test02

Description: 用quartusII编写的，基于vhdl语言的按键加法器，从0到11，也可通过拨码开关控制，从11到0，加入了键盘防手抖。-QuartusII prepared to use, based on the VHDL language button adder, from 0-11, also available via dial code switch control, from 11-0, joined the anti-tremor keyboard.
Platform: | Size: 204800 | Author: zhg | Hits:

[VHDL-FPGA-Verilog] quartus.ii.11.0-crack

Description: 这是最新版的quartus11.0的破解文件，怎么做我就不说了，里面说的很清楚，我已经尝试，保证能用！希望大家学习愉快！ 另外此破解只做内部测试交流，切勿用于商业用途，否则后果自负，请勿广泛传播。-This is the latest version of the quartus11.0 the crack file, how do I do not say, which made it very clear, I have tried, guaranteed to last! Hope you happy to learn! In addition to this internal testing only crack exchanges, not for commercial purposes, or peril, do not spread.
Platform: | Size: 20480 | Author: 王飞 | Hits:

[VHDL-FPGA-Verilog] quartus-11.0-crack

Description: quartusⅡ+11.0破解器,最新版quartus破解软件，可用。-quartus Ⅱ+11.0 cracker
Platform: | Size: 21504 | Author: likai | Hits:

[File Format] Quartus-II--Handbook-Version-11.0

Description: Quartus II 技术手册，详细说明quartus使用时注意事项-Quartus II Handbook Version 11.0
Platform: | Size: 6365184 | Author: railway | Hits:

[VHDL-FPGA-Verilog] Desktop

Description: un crack pra quartus II 11.0 sp1
Platform: | Size: 2235392 | Author: cronoxbu | Hits:

[VHDL-FPGA-Verilog] Qsys_nios2

Description: 本教程使用最新的Quartus 11.0sp1+Nios 11.0sp1开发工具。在最新的Quartus II软件中，使用了全新的Qsys进行SOPC系统的构建。 较之以前版本使用SOPC Builder构建有了很大的不同。 本教程为Altera最新的官方Tutorial。 一步步教你使用Qsys构建Nios II系统，并使用Nios II SBT开发应用程序。-This tutorial uses the latest Quartus 11.0sp1+ Nios 11.0sp1 development tools. In the latest Quartus II software, the use of a new build Qsys the SOPC system. Than the previous version has been using the SOPC Builder to build a big difference. This tutorial Altera' s latest official Tutorial. Step by step to teach you to use Qsys build Nios II system, and use the Nios II SBT application development.
Platform: | Size: 2358272 | Author: | Hits:

[VHDL-FPGA-Verilog] QIIv11.0_all_dll.ZIP

Description: dll for quartus ii 11.0
Platform: | Size: 1819648 | Author: Sergey | Hits:

[VHDL-FPGA-Verilog] eetop.cn_quartus_ii_11.0_sp1_patched_sys_cpt_dll.

Description: dll for quartus ii 11.0 windows
Platform: | Size: 973824 | Author: Sergey | Hits:

[VHDL-FPGA-Verilog] Crack_QII_11.1_Window11.1

Description: altera quartus 11.1破解版-altera quartus 11.1破解版工具
Platform: | Size: 2168832 | Author: zyc | Hits:

[VHDL-FPGA-Verilog] led2

Description: nios ii 流水灯源程序，采用quartus ii 11.0,nios ii 11.0,qsys构建CPU，由本人亲自编写，并下载至电路板验证流水灯成功-nios ii water lights, quartus ii 11.0 nios ii 11.0 qsys build the CPU, I personally prepared and downloaded to the board verification of light water
Platform: | Size: 8006656 | Author: 王超 | Hits:

[VHDL-FPGA-Verilog] Quartus_II_11.0

Description: quartus 11.0 应用解析，介绍该软件的使用方法-quartus 11.0 Application analysis, the use of the software are described
Platform: | Size: 769024 | Author: | Hits:

[VHDL-FPGA-Verilog] comparator

Description: FPGA比较器源码编写，适合初学者参考用,用ALTERA的QUARTUS 11.0编译-Compare FPGA source code written for beginners reference, compiled by ALTERA s QUARTUS 11.0
Platform: | Size: 313344 | Author: whq | Hits:

[Other] Quartus-II-11.0-32bit64bitCRACK

Description: quartus 11 64bit 32bit CRACK
Platform: | Size: 1422336 | Author: 孙云 | Hits:

[Other] sys_cpt

Description: quartus 11.0 破解文件，可用于32位quartus 11.0 破解文件(Quartus 11 crack file, can be used for 32 bit quartus 11 cracked file)
Platform: | Size: 391168 | Author: lixiang3878 | Hits:

[Other] onetap 19.11.2019

Description: Quartus best tooollll
Platform: | Size: 492544 | Author: knkbancon | Hits:

[VHDL-FPGA-Verilog] NIOS interface with SD card SPI

Description: So, the project is attached. Implemented NIOS2 processor on SOPC Quartus 11.1, uses SDRAM (on chip project in this version does not fit) SPI interface is used for communication between Nios and SD card (3 fpga outputs, one fpga input) Accordingly, it opens the message.txt file on the SD card and outputs its contents to the console, creates a file, fills it in, gives a list of files in the root.
Platform: | Size: 157645 | Author: hemamont@mail.ru | Hits:

[VHDL-FPGA-Verilog] NIOS Ethernet (enc28j60 chip)

Description: Implemented NIOS2 processor on SOPC Quartus 11.1, using internal Cyclone memory (on chip 32 kB) The software allows you to remotely access the web page. http://192.168.0.100/888 you can poke into the center through the Nios console there will be a reaction of +1 PING works.
Platform: | Size: 125284 | Author: hemamont@mail.ru | Hits:
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