Search - quartus error

[VHDL-FPGA-Verilog] FFT_VHDL

Description: FFT的VHDL源文件，经过在Quartus II上的测试无错误-FFT of the VHDL source file, after the Quartus II on the test error
Platform: | Size: 28672 | Author: 沈克镇 | Hits:

[Embeded-SCM Develop] TCL_Training

Description:
Platform: | Size: 618496 | Author: Jason | Hits:

[VHDL-FPGA-Verilog] rs-codec(255-223)

Description: RS编码是一种纠错码，本程序实现RS（255，223）用FPGA 实现RS编码，程序在Quartus II中调试通过。-RS coding is an error-correcting codes, the procedures for the realization of RS (255,223) with FPGA realization of RS codes, in the Quartus II program through the debugger.
Platform: | Size: 20480 | Author: yux | Hits:

[VHDL-FPGA-Verilog] nios2-flash-override

Description: 在开发nios2时，当把nios2中写的程序烧录到用epcs4中时会报错，原因是找不到epcs的映射资料，把这个文件，放到quartus根目录的bin文件夹内后，再打开一次flash program，就能下载成功！-Nios2 in the development, when the procedures wrote nios2 writers to use when epcs4 in error, the use of this document, into the root directory quartus the bin folder, you can download success!
Platform: | Size: 646144 | Author: cand | Hits:

[VHDL-FPGA-Verilog] Quartus_II_7.0

Description: Quartus II 7.0工程修复大法。修复不能打开的工程。有人在7.2的软件下用本方法也成功修复。他是修复这个错误： Error: Can t open project -- you do not have permission to write to all the files or create new files in the project s database directory-Quartus II 7.0 Dafa repair works. Restoration projects can not be opened. It was under the 7.2 software has successfully used this method to repair. He was to repair this error: Error: Can' t open project- you do not have permission to write to all the files or create new files in the project' s database directory
Platform: | Size: 543744 | Author: gan | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: quartus 提示的各种错误问题的分析，和部分解决方案-quartus error analisyr
Platform: | Size: 4096 | Author: zhan | Hits:

[VHDL-FPGA-Verilog] Quartus_Common_Error_And_Warning_Analyze

Description: Quatus常见错误汇总与分析该文章来源 :一是来自网上几处出处的汇总二是来自作者本人应用过程中遇到的问题。可以帮助大家解决烦人的quartus警告和error 仅供参考 -Summary and analysis of common mistakes Quatus the article Source: First, a summary of provenance from the Internet a few second is from the author and the problems encountered in the application process. Can help you solve the annoying warnings and error in quartus reference
Platform: | Size: 15360 | Author: 龙也 | Hits:

[VHDL-FPGA-Verilog] horse_light4

Description: 六种花样的流水灯，从左至右，从右至左，中间向两边，两边向中间，跳格闪烁等。verilog语言编写；并且扩展容易；有两个状态机构成实现。quartus 9.0和7.1仿真通过。无错误，无警告。-Six kinds of patterns of flowing water lights, from left to right, from right to left, in the middle to both sides, both sides toward the middle, jumping grid flicker. And expansion easy there are two state agencies into a realization. quartus 9.0 and 7.1 by simulation. Error-free, no warning.
Platform: | Size: 69632 | Author: tangjieling | Hits:

[VHDL-FPGA-Verilog] PN4

Description: 语言：VHDL 功能：该PN4序列的特点为将一个4位序列的前两位取异或，再让序列左移一位，用异或的结果作为序列的最后一位。序列周期是15，即15位伪随机序列。其中包括序列的产生模块和检测模块。对于误码检测，首先捕获相位。然后，规定测试的码的总个数，统计这些码中有多少个不能满足PN序列特点的，用计数器统计个数。如果发现误码过多，可能是相位失调，重新捕获相位，再进行误码检测。仿真工具：modelsim 综合工具：quartus -Language: VHDL function: the sequence characteristics of the PN4 a 4-bit sequence of the first two to take different or, let a sequence of left, with the result as a sequence of different or the last one. Sequence cycle is 15, or 15-bit pseudo-random sequence. Including sequence generation module and detection module. For error detection, the first capture phase. Then, provided the total number of test code, statistics, the number of these codes can not meet the characteristics of PN sequences, with the number of counter statistics. If you find too many errors, it may be the phase offset, re-acquisition phase, then the error detection. Simulation tools: modelsim synthesis tool: quartus II
Platform: | Size: 4096 | Author: huangjiaju | Hits:

[VHDL-FPGA-Verilog] quartus_error

Description: 关于Verilog HDL语言的集成开发环境quartus 的一些常见的错误分析-On the Verilog HDL language integrated development environment quartus some of the common error analysis
Platform: | Size: 12288 | Author: qk | Hits:

[VHDL-FPGA-Verilog] error-detection-device

Description: 使用Verilog语言编程，在Quartus ii 上实现的误码检测装置，并通过单片机将误码结果显示在LCD上。本代码具有一定的工程实践价值。-Using the Verilog language programming, implemented on the Quartus ii error detection device, and the result of errors by the microcontroller on the LCD display. The code has some value engineering practice.
Platform: | Size: 1899520 | Author: biyuming | Hits:

[VHDL-FPGA-Verilog] m_sequence

Description: 用verilog语言描述了M序列（伪随机通信）的编码、解码、纠错等功能，本人通过了Quartus II 以及Modelsim的仿真。-Verilog language description of the M sequence (pseudo-random communication) encoding, decoding, error correction, I passed the Quartus II and Modelsim simulation.
Platform: | Size: 6144 | Author: 周青晖 | Hits:

[DSP program] Report-10

Description: quartus 的错误控制模拟，自己做的，-Error Control and Cryptography for quartus II
Platform: | Size: 567296 | Author: chenyang feng | Hits:

[VHDL-FPGA-Verilog] SimpleFrequencyMeter

Description: 数字系统实验，简易频率计的设计。使用Quartus II 软件实现频率的测量，使用等精度法，误差控制在0.1 以内，测量范围1Hz到1MHz-Experimental digital systems, the design of simple frequency counter. Quartus II software frequency measurement, the use of precision method, the error is less than 0.1 , measuring range 1Hz to 1MHz
Platform: | Size: 7087104 | Author: mengchenyezi | Hits:

[VHDL-FPGA-Verilog] CRC

Description: 利用VHDL语言,用FPGA设计一个数据通信中常用的数据检错模块—循环冗余校验CRC模块,选用当前应用最广泛的EDA软件QUARTUS II作为开发平台-Using VHDL, FPGA design of a common data in data communication error detection module- Cyclic Redundancy Check (CRC) module, currently the most widely used EDA software QUARTUS II as a development platform
Platform: | Size: 2048 | Author: liangqing | Hits:

[Other] Quartus--errors-and-worning

Description: Quartus 9.0 常见的一些错误与警告，及一些可用的解决方案，涵盖了几乎大多数人都会遇到的错误与警告~-Quartus 9.0 Some common warning and error description, and some solutions, basically covering errors and warnings that most people will encounter ~
Platform: | Size: 156672 | Author: JX | Hits:

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