Description: RS coding is an error-correcting codes, the procedures for the realization of RS (255,223) with FPGA realization of RS codes, in the Quartus II program through the debugger.
- [rs-codec-5-6] - LGPL RS codec 5-6 Reed-Solomon Codes
- [si] - this information as MATLAB simulation an
- [RS] - ReedSolomon encoding decoding source cod
- [encode] - Quartus under the RS (5,3) encoder sourc
- [RSdecoder] - cpld/fpga RS (204,188) decoder of the Ve
- [RS_enc_dec_JPL_publ] - RS (255223) decoding process, and in acc
- [rsfinal] - Detailed and clear RS codec matlab simul
- [rs_decoder_31_19_6_latest.tar] - RS decoder FPGA to achieve, there TestBe
- [RsEncode] - Channel error-correcting codes, RS codes
File list (Check if you may need any files):
rs-codec(255-223)
.................\berlekamp.v
.................\chien-search.v
.................\data-rom.v
.................\decode.v
.................\encode.v
.................\inverse.v
.................\syndrome.v
.................\test-bench.v
.................\transcript
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