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Description: 一种基于TMS320C6416和FPGA的实时雷达信号模拟器设计-a TMS320C6416 and FPGA-based real-time radar signal simulator design
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Size: 220840 |
Author: imucc |
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Description: 一种基于TMS320C6416和FPGA的实时雷达信号模拟器设计-a TMS320C6416 and FPGA-based real-time radar signal simulator design
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Size: 220160 |
Author: imucc |
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Description: 倒车雷达源代码,超声波发射,接收,测距。-source code reversing radar, ultrasonic transmitter and receiver, location.
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Size: 229376 |
Author: 贾明 |
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Description: 雷达的噪声与杂波研究,怎样在噪声和杂波中发现目标回波,并提取信息。-radar noise and clutter, how the noise and clutter found echo, and retrieve information.
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Size: 121856 |
Author: 褚江涛 |
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Description: 其中两个项目自己做的:一个是雷达模拟跟踪,基于FPGA/CPLD的,里面包含了PCB和VHDL码,还有一个是SDIO的驱动程序(包括PCB原理图,SDIO协议方面的资料还有就是源码,这项目可用),还有一些嵌入式方面的资料,如TCP/IP协议栈的实现,FPGA的一些仿真实例-Two of the projects themselves to do: a tracking radar simulator is based on FPGA/CPLD
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Size: 6978560 |
Author: 肖寒 |
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Description: 介绍了被动雷达探测系统测向方法,提出了被动测向系统信号处理器的设计方法. 采用DSP(数字
信号处理器) + FPGA(现场可编程门阵列) 结构,使得系统的处理速度大大提高,而且集成度高、可靠性好、使
用灵活,具有很强的应用价值和参考价值.-Introduction of the passive radar detection system to test methods of measuring the passive signal processor to the system design method. The use of DSP (digital signal processor)+ FPGA (field programmable gate array) structure, making the system processing speed greatly enhanced, and high integration, reliability, and the use of flexible, has a strong value and reference value.
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Size: 165888 |
Author: 王功臣 |
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Description: 本文总结了CIC 滤波器理论要点,介绍了采用FPGA设计CIC 滤波器的基本方法,使滤波器的参数可以按实际需要任意更改,给出了仿真结,验证了设计的可靠性和可行性。采用该方法设计的CIC 滤波器已用于DDC芯片,也适合下一代高频雷达系统的要求。-This paper summarizes the main points of CIC filter theory, introduced the CIC filter design using FPGA basic ways in which filter parameters can be arbitrary according to the actual needs change, the simulation node to verify the reliability of the design and feasibility. Designed using the CIC filter has been used in DDC chips, also suitable for the next generation of high-frequency radar system requirements.
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Size: 700416 |
Author: 会飞的鱼 |
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Description: 数字上变频DUC是与数字下变频ddc相对应的工作.目前实现方式主要有:专用芯片,通用DSP和FPGA实现三种.本程序即给出了XILINX公司的Digital Up Converter核心程序(IP CORE)以及响应的使用说明,对于从事雷达,无线通信的工程人员和研究者有很大用处.-DUC is a digital up-conversion and digital down conversion that corresponds to the work of ddc. Realize the current approach are: ASIC, DSP and FPGA generic realize three. This procedure is given that the company XILINX core Digital Up Converter program (IP CORE) and to respond to instructions, for radar, wireless communications, engineers and researchers have great usefulness.
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Size: 305152 |
Author: 周严 |
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Description: 本文首先介绍了近些年来雷达模拟器获得广泛应用及其原因,然后对目标模
型、杂波模型和机载下视脉冲多普勒雷达的频谱分布进行了分析。接着,研究了
雷达回波信号模拟的实现方法,重点是采用网格映象法对地杂波信号的模拟进行
了分析和推导,并采用此方法对瑞利分布的高斯谱杂波、雷达回波信号进行了仿
真和分析。最后,针对用于某机载雷达信号模拟器系统的数字信号处理器进行了
设计和分析。
-This paper first introduces the radar simulator in recent years is widely available and the reasons for, and then on the target model, and the clutter model of airborne pulse Doppler radar, as under the spectrum distribution is analyzed. Then, to study radar signal simulation methods, with emphasis on the use of grid mapping method to the simulated clutter signal analysis and derivation, and use of this method, the Gaussian distribution of the Rayleigh spectrum of clutter, the radar echo signal simulation and analysis. Finally, for an airborne radar signal simulator system digital signal processor has been designed and analyzed.
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Size: 2909184 |
Author: 萝卜 |
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Description: 一个模拟雷达杂波的程序,对开发雷达模拟方面有借鉴作用.-A simulated radar clutter procedures, on the development of the radar simulator has reference.
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Size: 28672 |
Author: sky |
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Description: 一些源程序,主要包括CAN总线驱动、sdram VHDL实现、ucos2的移植、SDIO驱动、tcpip的实现、usb控制器代码、基于FPGA的雷达目标模拟器等-Some source code, including CAN bus driver, sdram VHDL implementation, ucos2 transplant, SDIO drivers, tcpip of implementation, usb controller code, based on the FPGA, such as radar target simulator
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Size: 6898688 |
Author: 磊 |
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Description: 优秀硕士论文,基于FPGA的雷达信号模拟器设计,对学FPGA的,特别是学雷达的同学有很好的参考价值-Outstanding master s thesis, based on radar signal simulator FPGA design, FPGA-on study, in particular the study of radar has a good reference Student Value
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Size: 749568 |
Author: zhang |
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Description: 将立体杂波图应用于气象杂波的CFAR处理,根据当前杂波环境的变化实时地产生杂内杂外标志,从而选择不同的信号处理支路处理当前气象杂波,提高了雷达的检测性能,降低了虚警概率。-Will be applied to three-dimensional meteorological clutter Clutter Map CFAR of treatment, according to the current clutter environment generated in real time with miscellaneous miscellaneous signs outside, so choose a different signal processing slip handle current weather clutter, improve radar detection performance and reduce the false alarm probability.
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Size: 173056 |
Author: zn |
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Description: 频率合成技术在现代电子技术中具有重要的地位。在通信、雷达和导航等设备中,它可以作为干扰信号发生器;在测试设备中,可作为标准信号源,因此频率合成器被人们称为许多电子系统的“心脏”。直接数字频率合成(DDS——Digital Direct Frequency Synthesis)技术是一种全新的频率合成方法,是频率合成技术的一次革命。本文主要分析了DDS的基本原理及其输出频谱特点,并采用VHDL语言在FPGA上实现。对于DDS的输出频谱,一个较大的缺点是:输出杂散较大。针对这一缺点本文使用了两个方法加以解决。首先是压缩ROM查找表,-Abstract;The frequency synthesis technology has the important status in the modern electronic technology. In equipment such as correspondence, radar and navigation, it may work as the unwanted signal generator In the test facility, may work as the standard signal source, therefore the frequency synthesizer is called by the people as "the heart" of many electronic systems .DDS——Digital Direct Frequency Synthesis technology is one brand-new frequency synthetic method, is a frequency synthesis technology revolution. This paper analyzes the basic principle of DDS and its output frequency spectrum characteristic, and realizes it with VHDL language on FPGA. In regard to the output
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Size: 961536 |
Author: 番薯军 |
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Description: 利用TS201超高性能的计算处理能力以及FPGA支持的高速接口交换能力,实现了一种对算法的适应性强、结构扩展方便的通用信号处理板,设计了一种基于该通用信号处理板的米波雷达阵列信号处理系统,并以幅相校正、自适应旁瓣相消的算法实现为例,详细介绍了该阵列信号处理系统算法的实现方法。该系统运行稳定可靠,达到了系统的设计要求。-n this paper,multiple DSPs are adopted to design the array signal processing system.By utilizing the high processing ability of the TS201 and the high-speed data exchange ability supported by FPGA,a general array signal processing system with strong adaptability and easy-expansion ability is fulfilled for radar signal processing.Implementation of the algorithm,such as ASLC and calibration of magnitude and phase,is described in detail.The whole system works well,and meets the requirement of the system...
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Size: 429056 |
Author: 将建 |
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Description: 为了满足科研与实验需要,提出并实现了一种以FPGA和高速D/A为核心,其结构简单,控制灵活,信号质量高的多功能信号源生成系统。该信号源生成系统能够实时产生中心频率在30~130 MHz的各种雷达、通信、导航和白噪声等信号,且产生的各种信号频率、幅度、相位和其他参数均可控。信号源作为基带信号单元配以混频模块,可实现在任意频段的信号。另外,该信号源还可以作为一个通用平台,通过FPGA内部程序的更新来实现其他复杂信号。-This paper presents and makes a multi-functional signal source based on FPGA and high speed D/A which has simple configuration,flexible controlling,and top-quality signals to satisfy needs of the scientific research and experiment.This signal source can generate several signals as radar signals,communication signals,navigation signals,noise signals and so on.These signals have center frequency between 30~130 MHz,its frequency,power,phase and other parameters are adjustable.This signal source can also ...
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Size: 330752 |
Author: 将建 |
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Description: 这是一些关于雷达杂波的论文资料 希望对大家有所帮助-These are the papers on the radar clutter of information you want to be helpful
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Size: 4730880 |
Author: 无名 |
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Description: 基于FPGA的多相滤波器设计
摘要: 以脉冲多普勒雷达信号处理为背景,研究了数字多相滤波器的特点和设计方法 进而研究数字多相滤波器的数字仿真
方法与 FPGA 实现技术 对于自主研究 设计和实现雷达信号处理的各种结构的滤波器具有重要的意义-Based FPGA multiphase Filter Design Abstract: Pulse Doppler signal processing background studied digital polyphase filter characteristics and design method then research digital multiphase filter Digital Simulation Method and FPGA Realization Technology For autonomous research design and realization radar signal processing various structures filter great significance
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Size: 322560 |
Author: sfef |
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Description: 用MATLAB设计及FPGA实现IIR滤波器的方法
摘要 本文介绍了IIR数字滤波器的传统设计思想与步骤及计算机辅助设计方法。并在FPGA上高效实现的低阶IIR滤波
器,其阶数低,实时响应快,适合雷达等的实时、高效处理环境。利用IIR滤波器的多相结构来实现该滤波器系统的方法,对于
四通道的情形在MATLAB上利用Simulink作了仿真, 并在目标板上对算法进行了实现,证明该系统能够同时处理四个通道的信号。-Using MATLAB Design and FPGA realization IIR Filter method Abstract This paper introduces IIR digital filter traditional design Thought and steps and CAD method. And FPGA on efficient realization low IIR filter, its order low, real response fast suitable radar real time, efficient processing environment. Use IIR filter multiphase structure realize the filter systematic method, for four channel circumstances in MATLAB on use Simulink made simulation and target board algorithm was realized proved system can simultaneously four channel signal.
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Size: 2021376 |
Author: sfef |
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Description: RMMSE雷达脉冲压缩快速算法中矩阵求逆的FPGA实现-RMMSE radar pulse compression fast algorithm for FPGA implementation matrix inversion
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Size: 366592 |
Author: lq |
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