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[Com Port] chuanxingzhuanhaunbingxing

Description: 通过多通道串-并转换器将多个同步串行数据流转换为并行数据-through multi-channel serial-to-parallel converter multiple synchronous serial data streams converted to parallel data
Platform: | Size: 52494 | Author: 胡飞逸 | Hits:

[Com Port] chuanxingzhuanhaunbingxing

Description: 通过多通道串-并转换器将多个同步串行数据流转换为并行数据-through multi-channel serial-to-parallel converter multiple synchronous serial data streams converted to parallel data
Platform: | Size: 52224 | Author: 胡飞逸 | Hits:

[Com Port] ChuanKou

Description: 这是一个汽车压力检测系统，利用RS232串口进行通信，并在可编程并行接口芯片8255A上进行编程，用到了查询方式A/D转换器接口电路及数据采集程序设计原理等-This is a car pressure detection system, using RS232 serial communications and programmable parallel interface 8255A programmable chips, used in the query mode A/D converter interface circuit and data acquisition procedures, such as design principles
Platform: | Size: 3857408 | Author: 方允福 | Hits:

[VHDL-FPGA-Verilog] SerialtoParallelConverter

Description: 串行转并行SerialtoParallelConverter-Serial to Parallel SerialtoParallelConverter
Platform: | Size: 26624 | Author: 磊 | Hits:

[VHDL-FPGA-Verilog] 23-10111

Description: a simple serial to parallel converter using XILLINX and VHDL (the number of the project represents the binary code used by the converter e.g 23- 10111)
Platform: | Size: 346112 | Author: theo | Hits:

[Other] par2ser

Description: 并/串转换器即并行输入、串行输出转换器，例如一个8bit输入的并/串转换器，输出时钟频率是输入时钟频率的8倍，输入端一个时钟到来，8个输入端口同时输入数据；输出端以8倍的速度将并行输入的8bit串行输出，至于从高位输出还是从低位输出，可以再程序中指定。-And/or parallel series converter input, serial output converter, for example, a 8bit input and/series converter, the output clock frequency is the input clock frequency of 8 times, the arrival of a clock input, 8 input data input port at the same time output to 8 times the speed of 8bit parallel input serial output, as output from a high level or low output, the procedure can be specified.
Platform: | Size: 1024 | Author: 赵军 | Hits:

[matlab] s2p

Description: serial to parallel converter
Platform: | Size: 6144 | Author: mon | Hits:

[Other] ch6example3

Description: A/D和D/A转换器模型 对串行和并行输出的8位A/D和D/A转换器进行仿真，转换值范围为0到255，转换采样率为1次/秒。 -A/D and D/A converter model, serial and parallel output of the 8-bit A/D and D/A converter to simulate the conversion values range from 0 to 255, change the sampling rate of 1 times/sec.
Platform: | Size: 4096 | Author: ln | Hits:

[VHDL-FPGA-Verilog] SERDES

Description: 基于Verilog的串并转换器的设计与实现，采用两种不同的方案来实现串并和并串转换的功能，并用ISE软件仿真以及chipscope的调试-Verilog-based serial and parallel converter design and implementation of two different programs to achieve the string and and and string conversion functions, and use the ISE software simulation and debugging chipscope
Platform: | Size: 785408 | Author: 陈凯 | Hits:

[VHDL-FPGA-Verilog] stp

Description: serial to parallel converter
Platform: | Size: 1024 | Author: dodia | Hits:

[VHDL-FPGA-Verilog] Serpar

Description: A serial to parallel converter is somewhat the reverse of the operation of parallel to serial converter. The data comes serially from the input port SERIN. The parallel data is output from DOUT port. Output port DRDY is asserted ‘1’ when the start bit, 8 bit data and the parity bit is received. Output port PERRn is asserted ‘0’ when the parity bit received is different from the parity generated inside the serial to parallel circuit. When parity error is detected, the serial to parallel circuit would be reset before its normal operation can be performed. This is the operation for serial to parallel module.
Platform: | Size: 1024 | Author: riadh | Hits:

[VHDL-FPGA-Verilog] 8051_7

Description: 1、模拟量输入选择接口2、用模拟比较器实现AD转换3、5SPI串行接口AD转换器TLC2543的应用4、6I2C接口AD转换器ADS11XX的应用5 等精度数字频率计的实现6、10时钟日历芯片PCF8563的应用7、48位并行接口ADC080X的接口与驱动8、91-wire测温芯片DS18XX的应用9、716位AD转换器AD7715的应用-1, analog input selection interface 2, using a comparator to achieve 3,5 SPI serial interface, AD converter AD converter TLC2543 application 4,6 I2C interface, AD converter ADS11XX applications such as precision digital frequency meter 5 to achieve 6, 10 clock the calendar application of 7,48 PCF8563 chip bit parallel interface, the interface with the driver ADC080X 8,91-wire temperature chips DS18XX application 9,716-bit AD converter AD7715 Application
Platform: | Size: 70656 | Author: hdm | Hits:

[VHDL-FPGA-Verilog] DDS-program

Description: DDS芯片中主要包括频率控制寄存器、高速相位累加器和正弦计算器三个部分（如Q2220）。频率控制寄存器可以串行或并行的方式装载并寄存用户输入的频率控制码；而相位累加器根据 dds 频率控制码在每个时钟周期内进行相位累加，得到一个相位值；正弦计算器则对该相位值计算数字化正弦波幅度（芯片一般通过查表得到）。DDS芯片输出的一般是数字化的正弦波，因此还需经过高速D/A转换器和低通滤波器才能得到一个可用的模拟频率信号。-The chips mainly includes DDS frequency control registers, high-speed phase accumulators and sine calculator 3 parts (such as Q2220). Frequency control register can serial or parallel way loaded and hosting the user input frequency control code And according to the phase accumulators DDS Frequency control code in each clock cycle in accumulation phase, get a phase value In this phase is sine calculator digital sine wave amplitude values calculated (chip general through the look-up table get). The general is DDS chip output digital sine wave, and so is required to pass through the D/A converter and low pass filter to get one of the available simulation frequency signal.
Platform: | Size: 24576 | Author: 林春权 | Hits:

[Software Engineering] VLSI

Description: The AD7654 is a low cost, simultaneous sampling, dual-channel, 16-bit, charge redistribution SAR, analog-to-digital converter that operates from a single 5 V power supply. It contains two low noise, wide bandwidth, track-and-hold amplifiers that allow simultaneous sampling, a high speed 16-bit sampling ADC, an internal conversion clock, error correction circuits, and both serial and parallel
Platform: | Size: 3964928 | Author: vxl | Hits:

[Software Engineering] Serialtoparaller

Description: 序列平行轉換器,對輸入的資料流進行轉換功用-Serial parallel converter to convert the input data stream function
Platform: | Size: 1024 | Author: 李大仁 | Hits:

[VHDL-FPGA-Verilog] seria-to-parallel

Description: 主要用来实现数据串并转换功能，内附2种实现程序-serial to parallel converter verilog code
Platform: | Size: 1024 | Author: 徐以为 | Hits:

[VHDL-FPGA-Verilog] serialtoparellel

Description: Write a HDL Code to use as a serial to parallel converter
Platform: | Size: 1024 | Author: Aftab Rai | Hits:

[matlab] ZigBeeIEEE

Description: The implementation was built on Matlab/Simulink using fundamental components in Simulink to demonstrate how reliably complex modulation schemes can be built, cost effectively and efficiently [5]. The design of ZigBee transmitter using MSK modulation is shown in the Figure 1. Here we map input data bits to 8-chip PN sequences to be transmitted and results in a chip rate of two mega chips per second. After that, resultant chip sequence is send to the serial to parallel converter. It is used here to separate the odd and even bit indexed chips. Following this bipolar data formatting is performed and signal modulated with a 2.4 GHz carrier on the In Phase and QuadraturePhase data stream and adds it to get the required transmitter output signal.
Platform: | Size: 11264 | Author: sabina | Hits:

[Other] UART

Description: 简单的uart串并转换实现，完成开发板和电脑之间的8位数据通信。-Simple uart serial to parallel converter achieve complete eight data communication between the development board and the computer.
Platform: | Size: 782336 | Author: 邓麟 | Hits:

[VHDL-FPGA-Verilog] srl2pal

Description: 数据流串并转换的实现方法多种多样，根据数据的排序和数量的要求，可以选用移位寄存器、RAM等来实现。对于数据量比较小的设计来说，可以使用移位寄存器完成串并转换；对于排列顺序有规定的串并转换，可以用case语句判断实现；对于复杂的串并转换，还可以用状态机实现-Serial data stream and converts a variety of implementations, according to the sort and quantity of data requirements, you can choose a shift register, RAM or the like. For the relatively small amount of data design, it can be completed using a shift register serial to parallel converter the order of the provisions of the serial to parallel converter can be used to achieve case statement to determine for complex serial to parallel conversion, you can use state machine
Platform: | Size: 18432 | Author: 一哥 | Hits:
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