Description: 自己定制自己的cpu，一个比较简单的cpu。熟悉处理器制作流程。-Customize their own cpu, a relatively simple cpu. Familiar with the production flow processor. Platform: |
Size: 563200 |
Author:贾晓东 |
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Description: The Synthetic PIC
Verion 1.1
This a VHDL synthesizable model of a simple PIC 16C5x microcontroller.
It is not, and is not intended as, a high fidelity circuit simulation.
This package includes the following files. Note that the license agreement
is stated in the main VHDL file, PICCPU.VHD and common questions are answered
in the file SYNTHPIC.TXT
Files:
README.TXT This file..
SYNTHPIC.TXT Questions and Answers
PICCPU.VHD Main processor VHDL file
PICALU.VHD ALU for the PICCPU
PICREGS.VHD Data memory
PICROM.VHD Program memory (created by HEX2VHDL utility)
PICTEST.VHD Simple test bench I used to do testing (optional)
PICTEST.CMD My Viewlogic ViewSim command file (again, optional)
TEST1.ASM First program I assembled and ran on it.
TEST2.ASM Another test program..
TEST3.ASM Yet another..
TEST4.ASM Yet another..
TEST5.ASM Yet another..
TEST6.ASM Yet another..
HEX2VHDL.CPP Utility for converting -The Synthetic PICVerion 1.1This a VHDL synthesizable model of a simple PIC 16C5x microcontroller.It is not, and is not intended as, a high fidelity circuit simulation.This package includes the following files. Note that the license agreementis stated in the main VHDL file , PICCPU.VHD and common questions are answeredin the file SYNTHPIC.TXTFiles: README.TXT This file .. SYNTHPIC.TXT Questions and AnswersPICCPU.VHD Main processor VHDL filePICALU.VHD ALU for the PICCPUPICREGS.VHD Data memoryPICROM.VHD Program memory (created by HEX2VHDL utility) PICTEST.VHD Simple test bench I used to do testing (optional) PICTEST.CMD My Viewlogic ViewSim command file (again, optional) TEST1.ASM First program I assembled and ran on it.TEST2.ASM Another test program. . TEST3.ASM Yet another .. TEST4.ASM Yet another .. TEST5.ASM Yet another .. TEST6.ASM Yet another .. HEX2VHDL.CPP Utility for converting Platform: |
Size: 48128 |
Author:likui |
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Description: This a simple MIPS processor datapath written in VERILOG hardware language. You can see the signals when emulating in signalscan. Compile it with verilog in linux.-This is a simple MIPS processor datapath written in VERILOG hardware language. You can see the signals when emulating in signalscan. Compile it with verilog in linux. Platform: |
Size: 2048 |
Author:thesky |
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Description: 使用函数实现简单的八位处理器
软件开发环境：ISE 7.1i
仿真环境：ISE Simulator
1. 这个实例实现通过ISE Simulator工具实现一个可以进行两个八位操作数四种操作的简单处理器；
2. 工程在project文件夹中，双击mpc.ise文件打开工程；
3. 源文件在rtl文件夹中，mpc.v为设计文件，mpc_tb.tbw是仿真波形文件；
4. 打开工程后，在工程浏览器中选择mpc_tb.tbw，在Process View中双击“Simulation Behavioral Model”选项，进行行为仿真，即可得到仿真结果。-The use of a simple function to achieve the eight-processor software development environment: ISE 7.1i simulation environment: ISE Simulator 1. This example through the ISE Simulator tool to achieve the realization of a two operand four of eight simple processor operation 2. works in the project folder, double-click to open the project file mpc.ise 3. rtl source file in the folder, mpc.v documents for the design, mpc_tb.tbw is the simulation waveform files 4. to open a project, a browser in the works Select device mpc_tb.tbw, double-click in the Process View in the " Simulation Behavioral Model" option, to carry out acts of simulation, simulation results can be obtained. Platform: |
Size: 221184 |
Author:王磊 |
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Description: Prawn is a simple eight-bit microprocessor based on the sample processor described in Chapter 9 of "VHDL : Analysis and Modeling of Digital Systems"by Z. Navabi, McGraw-Hill,Inc. 1993. We have added some features such as interrupt, stack and some conditions for conditional branch to the example in the book.
-Prawn is a simple eight-bit microprocessor based on the sample processor described in Chapter 9 of "VHDL : Analysis and Modeling of Digital Systems"by Z. Navabi, McGraw-Hill,Inc. 1993. We have added some features such as interrupt, stack and some conditions for conditional branch to the example in the book.
Platform: |
Size: 698368 |
Author:ying |
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Description: This tutorial guides you through the process of using Xilinx Embedded Development Kit
(EDK) software tools, in which this tutorial will use the Xilinx Platform Studio (XPS) tool to create
a simple processor system and the process of adding a custom OPB peripheral (an 32-bit adder
circuit) to that processor system by using the Import Peripheral Wizard. Platform: |
Size: 1451008 |
Author:praveen |
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Description: 用Verilog HDL语言写一个简单的处理器CPU。包括IR,Control unit,A,Addsub,G,Counter,8个寄存器。-Verilog HDL language used to write a simple processor CPU. Including IR, Control unit, A, Addsub, G, Counter, 8 registers. Platform: |
Size: 1190912 |
Author:sunying |
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Description: 本资料为MATLAB GUI设计的简单例程，包括两个源文件（.m和.fig)。其具体的功能为图片的提取及二值化处理。-This information is designed for simple MATLAB GUI routines, including the two source files (. M and. Fig). The specific function of the extraction and image binarization. Platform: |
Size: 797696 |
Author:湘彬 |
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Description: 图像处理，很简单的一个，就像ppt的一样，但是程序代码很重要-Image processing, a very simple one, like the ppt of the same, but code is very important Platform: |
Size: 8195072 |
Author:刘玺亮 |
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