Search - sine quartus

[VHDL-FPGA-Verilog] box

Description: 用vhdl语言编写的基于fpga的波形发生器，使用了quartusII程序。可以在1602液晶显示器上显示目前的波形种类。产生的波形分别是正弦波，三角波，锯齿波和方波。-VHDL language using FPGA-based waveform generator, using the procedures quartusII. 1602 liquid crystal display can show the current waveform types. Generated waveforms are sine wave, triangle wave, sawtooth and square wave.
Platform: | Size: 1708032 | Author: zhg | Hits:

[assembly language] sine

Description: 用verilog语言编的正弦波发生器，可以用QuartusII来打开这个源码，也可以转换成VHDL语言-Verilog language prepared by the sine wave generator can be used QuartusII to open the source code can also be converted into VHDL language
Platform: | Size: 104448 | Author: 雨孩 | Hits:

[Documents] singt_vhdl_quartus

Description: 正弦波发生器，可以应用，开发环境QUARTUS,实验箱为GW48-Sine wave generator, can be applied, development environment QUARTUS, experimental box for GW48
Platform: | Size: 891904 | Author: 在路上 | Hits:

[VHDL-FPGA-Verilog] sin_generator

Description: 在quartus 11 5.1 里用VHDL编写的正弦波发生器，经过仿真通过-Quartus 11 5.1 years in VHDL prepared using sine wave generator, through simulation through
Platform: | Size: 245760 | Author: 郭翠双 | Hits:

[VHDL-FPGA-Verilog] sin

Description: 基于Quartus II 5.0编写的正弦波发生器，可控频率，用vhdl编写的-Quartus II 5.0 on the preparation of the sine wave generator, controllable frequency, prepared using VHDL
Platform: | Size: 475136 | Author: uuk | Hits:

[VHDL-FPGA-Verilog] sinwave

Description: 正弦波信号发生的源码，有详细文档说明在quartus上创建工程到仿真、下载的步步操作-Sine wave signal source, has detailed documents created in the Quartus simulation works, download the step-by-step operation
Platform: | Size: 2471936 | Author: benyue | Hits:

[VHDL-FPGA-Verilog] dds_bate4[1].1

Description: 在quartus软件下用VHDL语言实现DDS，可产生正弦，余弦，方波，三角波以及锯齿波。-In the Quartus software using VHDL language realize DDS, can generate sine, cosine, square, triangle and sawtooth waves.
Platform: | Size: 3014656 | Author: 崔浩然 | Hits:

[VHDL-FPGA-Verilog] Triangle_Wave_generater

Description: 采用vhdl语言编程，基于quartus平台的三角波仿真。-Using VHDL language programming, based on the Quartus triangular wave simulation platform.
Platform: | Size: 2028544 | Author: 苏苏 | Hits:

[VHDL-FPGA-Verilog] sine-generator

Description: 原创：采用VHDL语言编写的正弦信号发生器。rom采用quartus自带的lpm生成，可产生正弦波。更改rom内容可改变波形-Original: Using VHDL languages sinusoidal signal generator. rom using Quartus LPM s own generation, can produce sine wave. Rom content changes can change the waveform
Platform: | Size: 675840 | Author: zzwuyu | Hits:

[Other] EP1C3_12_10_PHAS

Description: 基于FPGA的移相式DDS正弦信号发生器的VHDL源代码，压缩包里是在Quartus里做的工程，FPGA用的是Cyclone1C3系列-FPGA-based phase-shifting of the DDS signal generator sine VHDL source code, compressed in the bag is done in Quartus Engineering, FPGA is used Cyclone1C3 Series
Platform: | Size: 49152 | Author: deadtomb | Hits:

[VHDL-FPGA-Verilog] DDS

Description: 基于quartus的DDS，可以发生正弦波，方波，三角波，附带了顶层文件，注释在程序中-Quartus on the DDS, can occur sine wave, square wave, triangle wave, with the top-level documents, notes in the procedure
Platform: | Size: 77824 | Author: ivan | Hits:

[VHDL-FPGA-Verilog] learn_dds

Description: 基于quartus ii 9.0的简易dds波形发生器，可以产生正弦，方波，三角波，可变幅，可变频。非常适合学习使用，使用时请按自己的芯片和引脚设置-Quartus ii 9.0 Based on dds simple waveform generator can produce sine, square, triangle wave can be amplitude, frequency can be. Very suitable for learning to use, when used by their chip and pin set
Platform: | Size: 732160 | Author: 陈东旭 | Hits:

[VHDL-FPGA-Verilog] Quartus

Description: 用vhdl编写的信号发生器源程序，可以产生正弦波，也可以根据需要产生其他波形-Prepared using vhdl source signal generator can produce sine wave, you can also produce other waveforms as needed
Platform: | Size: 375808 | Author: LFwen | Hits:

[VHDL-FPGA-Verilog] VHDL_implementation_1KHz_sine_wave_generator

Description: 用VHDL实现1KHz正弦波发生器，编译器是Quartus II 5.4-1KHz sine wave generator using VHDL implementation, the compiler is a Quartus II 5.4
Platform: | Size: 187392 | Author: ken | Hits:

[VHDL-FPGA-Verilog] boxingfashengqi

Description: DDS波形发生器，能够产生方波和正弦波的双通道的波形发生器，在quartus环境下运行-DDS waveform generator to produce square wave and sine wave of dual-channel waveform generator, runs under the environment in quartus
Platform: | Size: 189440 | Author: 李欣 | Hits:

[VHDL-FPGA-Verilog] dds

Description: 在quartus下的DDS设计，Verilog语言，可以产生正弦波、三角波、方波等，频率可调。-Under the DDS in quartus design, Verilog language, you can produce sine wave, triangle wave, square wave, frequency adjustable.
Platform: | Size: 2632704 | Author: 米多 | Hits:

[VHDL-FPGA-Verilog] sinbo

Description: 基于quartus II的正弦波发生器，可调频率相位，用其时序仿真即可显示，分模块设计的。有sin。mif文件.-Based quartus II of the sine wave generator, adjustable frequency and phase, with the timing simulation can show that sub-module design. A sin. mif file.
Platform: | Size: 995328 | Author: liyu | Hits:

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[VHDL-FPGA-Verilog] box

[assembly language] sine

[Documents] singt_vhdl_quartus

[VHDL-FPGA-Verilog] sin_generator

[VHDL-FPGA-Verilog] sin

[VHDL-FPGA-Verilog] sinwave

[VHDL-FPGA-Verilog] dds_bate4[1].1

[VHDL-FPGA-Verilog] Triangle_Wave_generater

[VHDL-FPGA-Verilog] sine-generator

[Other] EP1C3_12_10_PHAS

[VHDL-FPGA-Verilog] DDS

[VHDL-FPGA-Verilog] learn_dds

[VHDL-FPGA-Verilog] Quartus

[VHDL-FPGA-Verilog] VHDL_implementation_1KHz_sine_wave_generator

[VHDL-FPGA-Verilog] boxingfashengqi

[VHDL-FPGA-Verilog] dds

[VHDL-FPGA-Verilog] sinbo

[VHDL-FPGA-Verilog] sine-generator

[VHDL-FPGA-Verilog] DDS

[VHDL-FPGA-Verilog] sine-function-generator-design

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